Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Lumped type parameters
Reexamination Certificate
2002-11-21
2004-09-28
Le, N. (Department: 2858)
Electricity: measuring and testing
Impedance, admittance or other quantities representative of...
Lumped type parameters
C324S676000, C324S076530, C324S076550
Reexamination Certificate
active
06798218
ABSTRACT:
The invention relates to a circuit for measuring absolute spread in capacitors implemented in planary technology. Planary technologies are to be understood to include integrated circuit (IC−), thick film, thin film and printed circuit board technologies. Such measuring circuits are on themselves known. An example thereof implemented in IC technology is e.g. disclosed in UK Patent Application GB 2 184 621.
The component values of circuit elements implemented in planary technology and in particular in integrated circuit (IC) technology are known to have absolute and relative spread. Absolute spread is understood to be the spread in the actual component values from a wanted average value, whereas relative spread is understood to be the spread in the component values relative to each other. Absolute spread is mainly caused by variation of the thickness or the composition of planar layers, whereas relative spread is caused by the inhomogenities along the X and Y axes of the planar layers. In practice the absolute spread in the component values of elements of a circuit implemented in planary technology, hereinafter indicated as “planary implemented circuit”, is much larger than the relative spread in the component values of said elements.
The above known circuit is used for self-calibration of capacitances for a binarily weighted array of capacitances and provides for an interrupted measurement of the absolute spread. This feature excludes the application of the circuit for functions which require continuous operation, because during the calibration phase the array of capacitances has to be disconnected from the rest of the circuit. This in particular rules out the known circuit from being used in e.g. receivers.
It is an object of the present invention to provide a continuous and reliable measurement of absolute spread of integrated capacitors.
A circuit for measuring absolute spread in capacitors implemented in planary technology according to the invention is therefore characterised in that it comprises a charge pump supplying a charge current to an internal capacitor (Cint), the voltage across the internal capacitor (Cint) being coupled through a comparator for comparing said voltage with first and second threshold levels to a bistable multivibrator for reversing the direction of the charge current to charge the internal capacitor (Cint) when said voltage decreases below the second threshold level and to decharge the internal capacitor (Cint), when said voltage increases above the first threshold level, a reference voltage determining the charge current, as well as the voltage range between said first and second threshold levels, an output signal of the bistable multivibrator being coupled to frequency measuring means to compare the repetition frequency thereof with a reference frequency.
The invention is based on the recognition that due to the small relative spread of elements within a planary implemented circuit, a reliable indication for the absolute spread of any and all elements within such circuit is obtained by measuring the actual deviation of the value of only one element thereof from a precision reference value.
By applying the above measure of the invention, an internal capacitor (Cint) is being measured by using this capacitor as integrating element in an oscillator configuration. For a given Cint, the frequency of this oscillator is defined by the voltage range between the first and second threshold levels on the one hand and the charge/decharge current of the internal capacitor (Cint) on the other hand. By having both voltage range and charge/decharge current depend on the same, by internal circuit elements defined parameter, i.e. said reference voltage, the oscillation frequency of the circuit becomes independent from said parameter and varies only with the internal capacitor (Cint) and the external resistor (Rext). The less spread in the external resistor (Rext), the more accurate the oscillation frequency will vary with the absolute spread of the internal capacitor (Cint) only. Preferably a high precision resistor is used for the external resistor (Rext). To derive a measure for the absolute spread of the internal capacitor (Cint) from the oscillating frequency, frequency measuring means are used to compare the repetition frequency of the oscillating frequency with a reference frequency. Preferably a high precision crystal oscillator is used to generate the reference frequency.
A preferred embodiment of circuit according to the invention is characterised in that said voltage range is proportional to the reference voltage. This allows for a proper matching of circuit elements, therewith increasing the accuracy of the measurement.
Preferably such circuit is characterised in that the charge current is generated by the reference voltage being provided across an external resistor Rext. A discrete resistor can now be used, such discrete resistor normally having much less spread than planary implemented resistors. This allows to further increase the accury of the measurement.
Preferably such circuit is characterised by a monotonous variation of the voltage across said internal capacitor in the range between first and second threshold levels being defined by the quotient of the reference voltage and the internal capacitor (Cint), said range being defined by the magnitude of the reference voltage and said charge current being defined by the quotient of the reference voltage and the external resistor (Rext). This measure allows for proper element matching resulting in an immunity of the oscillation frequency from parameters, which are defined by internal elements. Another preferred embodiment of a circuit according to the invention is characterised by said internal capacitor (Cint) being coupled between emitters of first and second transistors, the collectors and the bases thereof being coupled through mutually equal load resistors to a first supply voltage, said collectors being coupled to inputs of a negative feedback circuit for a negative feedback of the collector output voltage of said first and second transistors to the base inputs thereof, the emitters of said first and second transistors being coupled to first and second outputs of said charge pump.
REFERENCES:
patent: 5563779 (1996-10-01), Cave et al.
patent: 2 184 621 (1986-12-01), None
Roher, Dr. K.C.; “Measuring Capacitance”, Elektor Electronics, Feb., 1996, Dorchester, G.B.; pp. 48-51.
Chen et al; “An On-Chip, Interconnect Capacitance Characterization Method with Sub-Femto-Farad Resolution”, IEEE Ttransactions on Semiconductor Manufacturing, vol. 11, No. 2, May, 1998; pp. 204-210.
Le N.
McDermott, Esq. Robert M.
Nguyen Vincent Q.
Semiconductor Ideas to Market (ITOM) B.V.
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