Circuit for locking a signal to a reference value

Coded data generation or conversion – Converter compensation

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348697, 341155, H04N 518

Patent

active

057317712

ABSTRACT:
The present invention relates to a circuit for locking an analog signal to a reference value, including an analog-to-digital converter receiving the analog signal modified by the charge stored in a capacitor. A digital comparator receives the output of the converter and a reference digital value, and controls capacitor charging and discharging sources. A memory point is a stability condition flag for inhibiting the charging and discharging of the capacitor. A circuit for analyzing the converter output activates the flag when the successive values of the converter output meet a predetermined stability condition, and deactivates the flag when the successive values of the converter output meet a predetermined divergence condition.

REFERENCES:
patent: 4811016 (1989-03-01), Millward et al.
patent: 4859871 (1989-08-01), Kobayashi et al.
patent: 5483295 (1996-01-01), Kim et al.
patent: 5532758 (1996-07-01), Honma
French Search Report from French Patent Application 94 14414, filed Nov. 25, 1994.
Patent Abstracts of Japan, vol. 015, No. 165 (E-1061), Apr. 25, 1991 & JP-A-03 035666 Mitsubishi Electric Corp.
Patent Abstracts of Japan, vol. 011, No. 046 (E-479), Feb. 12, 1987 & JP-A-61 210770 Hitachi Ltd.

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