Circuit for linearizing electronic devices

Amplifiers – Hum or noise or distortion bucking introduced into signal...

Reexamination Certificate

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Details

C330S136000

Reexamination Certificate

active

06717463

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to electronic circuits. More specifically, the present invention relates to systems and methods for linearizing electronic, devices, circuits and systems.
DESCRIPTION OF THE RELATED ART
The front ends of radio frequency (RF) communication systems typically include amplifiers and mixers. The receiver front-end amplifier serves to boost a received RF signal and the mixers serve to downconvert the signal from high RF frequencies to lower frequencies more suitable for processing and output. Unfortunately, when the RF amplifiers and mixers handle desired received signals in a presence of strong interferers, distortion often results from the strong interferers that can degrade the quality of the desired signal. The distortion products that fall in the band of the received signal are most dangerous. They are typically generated due to third degree nonlinearities and called third-order intermodulation (IM3) distortion. With two strong interferers at f
1
=1000 MHz and f
2
=1001 MHz, for example, the intermodulation distortion products will be generated at (2f
1
−f
2
) and (2f
2
−f
1
). Hence, for the exemplary signals centered at 1000 MHz and 1001 MHz the distortion signals will be centered at 999 MHz and 1002 MHz. If one of these signals falls in band of the desired signal, it may degrade receiver sensitivity.
Conventionally, it is difficult to achieve low levels of the distortion inasmuch as the third degree nonlinearity of the circuit is an inherent property of amplifying active devices. Typically, a lower distortion is achieved at the expense of an increased DC current consumption. The latter is undesirable especially in a wireless communication system powered by a battery where the higher current consumption results in a shorter battery life and, thus, a shorter system operation (for example, the talk time of the cellular phones).
Hence, a need remains in the art for a system or method for improving the linearity of amplifiers and mixers used in RF receivers and other systems without a significant rise in the DC current consumption.
SUMMARY OF THE INVENTION
The need in the art is addressed by the system and method of the present invention. In an illustrative application, the invention is realized as a radio frequency amplifier. The inventive amplifier includes a first transistor having first, second and third terminals. In the illustrative embodiment, the first transistor is bipolar with the first terminal being an input terminal and the second terminal being an output terminal and the third terminal being a common terminal. A linearization circuit is included having first and second terminals. The first terminal is connected to the common terminal of the transistor and the second terminal is connected to the input terminal of the transistor. The linearization circuit doesn't interfere with the transistor amplification of an input RF signal. But, in the presence of two input signals or an input modulated carrier, the linearization circuit forces the control voltage between the input terminal and the common terminal of the transistor to be zero at the difference frequency of the two input signals or at a modulation frequency of the input modulated carrier.
In a specific embodiment, the linearization circuit is implemented as a non-inverting unity gain buffer with an input terminal connected to the common terminal of the transistor and an output terminal connected to the input terminal of the transistor. The buffer is designed so that its gain is unity and its output impedance is low at the difference frequency of the two input signals or at the modulation frequency of the input modulated carrier. It forces the transistor input voltage to follow the common terminal voltage at these low frequencies. The buffer gain is sufficiently low and its output impedance is high in the amplifier operating frequency band to allow the amplification of input signals by the transistor in this band.
In another specific embodiment, the linearization circuit includes a non-inverting unity gain buffer with an input and output terminals and a radio frequency choke coil. The input terminal of the buffer is connected to the common terminal of the transistor and the output terminal is connected to the first terminal of the choke coil. The second terminal of the choke coil is connected to the input terminal of the transistor. In accordance with the inventive teachings, the choke coil has high impedance in the operating frequency band of the amplifier and, thus, isolates the buffer output from the amplifier input in this band. The choke coil has a low impedance at the difference frequency of the two input signals or at the modulation frequency of the input modulated carrier. Thus, the choke doesn't prevent the buffer from forcing the transistor input voltage to follow the common terminal voltage at the mentioned frequencies.
In alternative embodiments, circuitry is shown for providing a DC offset at the input of the transistor. As another alternative, the linearization circuit consists of series inductor and capacitor connected between the common and input terminals of the transistor. This series LC circuit acts as an open circuit in the operating frequency band of the amplifier and as an AC short circuit at the difference frequency of the two input signals or at the modulation frequency of the input modulated carrier.
In yet another embodiment, the linearization circuit consists of the first and the second series inductor and capacitor circuits. The first series LC circuit is connected between the common terminal of the transistor and ground and the second series LC circuit is connected between the input terminal of the transistor and ground.
The inventive method provides increased linearity and minimal third-order distortion in amplifiers, mixers, and other circuits used in high frequency circuits and systems.


REFERENCES:
patent: 4924194 (1990-05-01), Opas et al.
patent: 5138275 (1992-08-01), Abbiati et al.
patent: 5694069 (1997-12-01), Kasashima et al.
patent: 5808511 (1998-09-01), Kobayashi
patent: 6111461 (2000-08-01), Matsuno
patent: 6137366 (2000-10-01), King
patent: 6262631 (2001-07-01), Li
patent: 6353360 (2002-03-01), Hau et al.
patent: 6437646 (2002-08-01), Masahiro
patent: 53012213 (1978-03-01), None
patent: 56140709 (1981-04-01), None

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