Boots – shoes – and leggings
Patent
1991-09-05
1995-05-23
Bowler, Alyssa H.
Boots, shoes, and leggings
364239, 3642391, 364DIG1, G06F 1300, G06F 1342
Patent
active
054189306
ABSTRACT:
An Asynchronous Communications Interface to Synchronous Circuit having three stages is disclosed. The first stage captures the control and data signals from an asynchronous bus and converts them into signals which are synchronous to the internal clocks of the interface chip. The second stage of the interface is a synchronous state machine which utilizes the synchronized signals generated by the first stage to determine the current state of the asynchronous bus. The third stage of the interface uses the data generated by the synchronous state machine and the control and data signal capture logic to validate the data in a synchronous manner. This allows further processing of the data from the asynchronous bus without the use of any further asynchronous logic or timing.
REFERENCES:
patent: 4435759 (1984-03-01), Baum et al.
patent: 4593282 (1986-06-01), Acampora et al.
patent: 4627070 (1986-12-01), Champlin et al.
patent: 4631666 (1986-12-01), Harris et al.
patent: 4665518 (1987-05-01), Champlin et al.
patent: 4737971 (1988-04-01), Lanzafame
patent: 4805194 (1989-02-01), Wesolowski
patent: 4962474 (1990-10-01), Kreiser
patent: 4992930 (1991-02-01), Gilfeather et al.
patent: 5054020 (1991-10-01), Meagher
patent: 5191657 (1993-03-01), Ludwig et al.
patent: 5220651 (1993-06-01), Larson
IBM Technical Disclosure Bulletin, vol. 24, No. 1A Jun. 1981 "Signal Transition Detection Circuit".
IBM Technical Disclosure Bulletin, vol. 24, No. 2 Jul. 1981 "Level Sensitive Scan Design Testable Asynchronous . . . ".
IBM Technical Disclosure Bulletin, vol. 27, No. 12 May 1985 "LSSD Design Tchniques".
IBM Technical Disclosure Bulletin, vol. 23, No. 5, Oct. 1980 "Edge-Triggerd Latch Design".
IBM Technical Disclosure Bulletin, vol. 21, No. 10 Mar. 1979 "Set/Reset Shift Register Latch".
IBM Technical Disclosure Bulletin, vol. 31, No. 11, Apr. 1989, pp. 34-35; "Motorola 68000 LSSD Write Mechanism Invention Implementation".
Microcomputer Interfacing, by Harold S. Stone, pp. 107-109; US, Reading, Addison Wesley, 1982.
Bowler Alyssa H.
Flynn John D.
Harrity John
International Business Machines - Corporation
Redmond, Jr. Joseph C.
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