Multiplex communications – Wide area network – Packet switching
Patent
1989-07-17
1991-02-05
Olms, Douglas W.
Multiplex communications
Wide area network
Packet switching
370 859, H04J 300
Patent
active
049911708
ABSTRACT:
An interface circuit which connects a Digital-Signal-Processor (DSP) to a serial controller. The interface circuit includes a bi-directional multiplexer which converts the separate address and data busses of the DSP to the multiplexed data and address bus of the serial controller. A timing generator is included for keeping track of the number of clock cycles in the present access. A decoder connected to the timing generator decodes the number of clock cycles and generates the appropriate control signals to both the serial controller and the DSP.
REFERENCES:
patent: 4754274 (1988-06-01), Iles
Money, Steve A., Microprocessor data book, 1982, pp. 129, 130.
Motorola Inc., MC68008, Nov. 1982, p. 1--1.
AG Communication Systems Corporation
Baca Anthony J.
Kizou H.
Olms Douglas W.
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