Circuit for interfacing a balanced radio frequency power...

Wave transmission lines and networks – Coupling networks – Balanced to unbalanced circuits

Reexamination Certificate

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C330S116000, C330S117000

Reexamination Certificate

active

06696902

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a circuit for interfacing a balanced Radio Frequency (RF) Power Amplifier with an unbalanced load.
2. Description of the Prior Art
From Richard Frey: “A Push-Pull 300-Watt Amplifier for 81.36 MHz”, Applied Microwave & Wireless, April 1998, pp. 36-42 a circuit is known for coupling an open-drain balanced output power stage to an unbalanced antenna.
In this circuit, a balun transformer wound on a straight ferrite core is utilized for transforming the balanced RF Power Signal into an unbalanced signal for the antenna.
The DC supply voltage supply is fed to the drain terminals of the MOSFET transistors through each their inductor L
4
and L
5
, respectively.
From an application note for the HELA-10 balanced amplifier made by Mini-Circuits Company (US), a circuit of the same kind is known. Here, the balun transformer is without ferrite core.
From the article: “Silicon Chases GaAs for Cellular PA Slots”, Microwave Engineering Europe, April 1999, pp. 15-18 a 900 MHz balanced output Power Amplifier integrated circuit with NPN transistor open collector outputs is known.
From Werner Simburger et al., paper TP 13.6, 1999 IEEE International Solid-State Circuits Conference Slide Supplement, session 13, pp. 200-201 and 1999 IEEE International Solid-State Circuits Conference Digest of Technical Papers pp. 230-231, an Application Circuit is known for coupling the latter balanced power amplifier to an unbalanced 50&OHgr; antenna.
This Application Circuit comprises an interface circuit with a shunt inductor and a series capacitor from the first open collector output, and a shunt capacitor and a series inductor from the second open collector output to the antenna, respectively.
Such an interface circuit is well known in the art of balancing and unbalancing signals as “the high-pass-low-pass circuit”. The capacitor-inductor pair for each output forms a resonant circuit tuned to the frequency in question, the phase of the signal from the first output is shifted through an angle of +90°, and the phase of the signal from the second output is shifted through an angle of −90°, the two signals thus becoming in phase, this fact permitting them to be coupled together at the antenna terminal without need for any further unbalancing components.
In this known Application Circuit, several components are utilized for feeding supply current to the open collector outputs. The supply current to the first output is fed in through the shunt inductor, the latter being decoupled at a distant end thereof by a capacitor. The supply current to the second output is fed in through the series inductor from the output node.
As the RF energy level at this node must necessarily be quite high, an RF filter is apparently being utilized between the power supply decoupling capacitor and the output node. In the Application Note, this filter seems to incorporate two 84&OHgr; microstrips and a series inductor.
This method of feeding the outputs with DC Power has distinct disadvantages. Two paths extend from the terminals with high RF Power levels to the DC Supply terminal. The filter leading from the output node (having the highest power level) seems to be a tuned filter which presumably cannot filter both the fundamental and the harmonics effectively. Further, a filter of this kind comprising many components may very well give rise to parasitic oscillations.
Further drawbacks of this known Application Circuit are:
The Application Circuit is asymmetric which is generally detrimental in balanced circuits; and
The Application Circuit always loads the amplifier inductively, as the series inductor between the microstrips transforms into shunt inductors loading both amplifier outputs.
SUMMARY OF THE INVENTION
The invention is a circuit for interfacing a balanced RF Power Amplifier with an unbalanced load, with a minimum number of components and eliminates the drawbacks of the prior art.
The circuit of the invention is for use with a balanced RF Power Amplifier having first and second open-ended outputs acting in phase opposition. The unbalanced load can for example be a single-ended antenna.
The circuit of the invention comprises a first shunt inductor and a series capacitor connected to the first output and a first shunt capacitor and a series inductor connected to the second output, the series capacitor and the series inductor each forming part of a flow path leading to the load. The first shunt inductor forms part of a flow path from a power supply to the first output.
In a circuit to interface a balanced RF Power Amplifier having first and second open-ended outputs acting in phase opposition with an unbalanced load such as a single-ended antenna, the circuit of the invention comprises a first shunt inductor and a series capacitor connected to the first output and a first shunt capacitor and a series inductor connected to the second output, the series capacitor and the series inductor each forming part of a flow path leading to the load, and the first shunt inductor forming part of a flow path from a power supply to the first output, the flow path comprising a second shunt inductor connected to the second output and forming part of a flow path from a power supply to said second output.
The second output may be supplied with power directly to the output terminal, while still obtaining the general advantages from the high-pass-low-pass circuit.
Further, the open-ended second output terminal has a considerably lower RF energy level than the output node. The connection of the inductor constituting part of the supply current path to a terminal with a reduced RF energy level diminishes considerably the risk for unwanted radiation, spurious oscillations, etc.
It is generally preferred that the first shunt inductor with the series capacitor, and/or the first shunt capacitor with the series inductor, respectively, form resonant circuits at or near the operating frequency of the circuit so that correct performance of the high-pass-low-pass circuit is ensured.
In a preferred embodiment, the capacitance of the first shunt capacitor corresponds approximately to the sum of the capacitances of two capacitors required to form resonant circuits with the series inductor and the second shunt inductor, respectively, at or near the operating frequency of the circuit resulting in the first shunt capacitor forming part of two oscillating circuits, both being in resonance at the operating frequency; that is, a parallel resonant circuit constituted by the second shunt inductor and part of the first shunt capacitor, and a series resonant circuit constituted by the rest of the first shunt capacitor and the series inductor.
In this way, the second shunt inductor, forms part of the parallel resonant circuit which does not load the second output terminal. Furthermore, the value of the second shunt inductor can be chosen arbitrarily, since the value of the first shunt capacitor can be adjusted to ensure parallel resonance with the second shunt inductor.
In another preferred embodiment, the inductance of the second shunt inductor by a certain amount exceeds the value required to form a resonant circuit, at or near the operating frequency of the circuit, with a capacitor having the capacitance of the first shunt capacitor less the capacitance of a capacitor required to form a resonant circuit at the same frequency with the series inductor, and the inductance of the first shunt inductor by approximately the same amount exceeds the value required to form a resonant circuit with the series capacitor at the same frequency.
Hereby, it is obtained that each of the first and second shunt inductors impose approximately the same inductive load on each respective amplifier output. Thus, this embodiment of the circuit according to the invention loads the amplifier outputs with virtual inductances of a certain, desired value.
In a third preferred embodiment, the circuit comprises a second shunt capacitor connected to the first output, and the capacitance of the first shunt capacitor excee

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