Electricity: measuring and testing – Plural – automatically sequential tests
Patent
1986-04-14
1987-12-22
Eisenzopf, Reinhard J.
Electricity: measuring and testing
Plural, automatically sequential tests
324158R, G01R 1702
Patent
active
047148764
ABSTRACT:
A circuit for adding a function such as a test mode to an integrated circuit includes a pad for receiving an enabling voltage when the added function is to be enabled, and a semiconductor device having an input terminal connected to the pad, a reference terminal for receiving a reference voltage, a diode junction having one side connected to the input terminal and its other side connected to the reference terminal for applying a bias across the diode junction, and an output terminal controlled by the diode junction such that current flows therethrough when the diode junction is forward biased, and does not flow when said diode junction is reversed biased. Also included is a load device connected to the output terminal of the semiconductor means for providing an electrical load when the diode junction is forward biased, and a conductor connected intermediate the semiconductor device and the load device for providing an output voltage of a first level when the polarity and magnitude of the enabling voltage applied to the pad is sufficient to forward bias the diode junction, and for providing an output voltage of a second level when the enabling voltage applied to the pad is not sufficient to forward bias the diode junction. An embodiment is also disclosed wherein the semiconductor device is a parasitic transistor with elements in common with an output driver transistor of an input/output circuit of an integrated circuit.
REFERENCES:
patent: 4229670 (1980-10-01), Thommen et al.
patent: 4402003 (1983-08-01), Blanchard
patent: 4425516 (1984-01-01), Wanbass
patent: 4506282 (1985-03-01), Baliga
patent: 4527115 (1985-07-01), Mehotra et al.
patent: 4618872 (1986-10-01), Baliga
"FET-Bipolar Integration", by Vora, IBM Tech. Disc. Bull., vol. 13, #5, 10/79, p. 1106.
"Bipolar and FET Integration on a Common Chip", by Kalter, IBM Tech. Disc. Bull., vol. 15, #12, 5/73, pp. 3755-3756.
Crafts Harold S.
Gay Richard B.
Burns W.
Eisenzopf Reinhard J.
Gonzalez Floyd A.
Hawk Jr. Wilbert
NCR Corporation
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