Circuit for high-resolution phase detection in a digital RF...

Details Circuit for high-resolution phase detection in a digital RF... Circuit for high-resolution phase detection in a digital RF...

2007-04-17

2007-04-17

Young, Brian (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S155000

Reexamination Certificate

active

11274965

ABSTRACT:
A novel time-to-digital converter (TDC) used as a phase/frequency detector and charge pump replacement in an all-digital PLL within a digital radio processor. The TDC core is based on a pseudo-differential digital architecture making it insensitive to NMOS and PMOS transistor mismatches. The time conversion resolution is equal to an inverter propagation delay, e.g., 20 ps, which is the finest logic-level regenerative timing in CMOS. The TDC is self calibrating with the estimation accuracy better than 1%. The TDC circuit can also serve as a CMOS process strength estimator for analog circuits in large SoC dies. The circuit also employs power management circuitry to reduce power consumption to a very low level.

REFERENCES:
patent: 4090191 (1978-05-01), Kinbara
patent: 6429693 (2002-08-01), Staszewski et al.
R. B. Staszewski, S. Vemulapalli, P. Vallur et al., “1.3 V 20 ps Time-to-Digital Converter for Frequency Synthesis in 90 nm CMOS,” IEEE Trans. on Circuits and Systems II: Express Briefs, 2005, no month.

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