Circuit for generating phases to control the carrying out of ope

Details Circuit for generating phases to control the carrying out of ope Circuit for generating phases to control the carrying out of ope

1978-09-12

1981-04-14

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307246, 307DIG4, 307571, H03K 5135, H03K 1716, H03K 1726, H03K 17693

Patent

active

042622190

ABSTRACT:
A control signal generating circuit is provided which is capable of activating its output in one of two modes depending on whether a transition occurs between the levels of one of the two voltages before or after a similar transition between levels occurs in the other voltage.

REFERENCES:
patent: 3778784 (1973-12-01), Karp et al.
patent: 3835457 (1974-09-01), Yu
patent: 3866176 (1975-02-01), Baitinger et al.
patent: 3868657 (1975-02-01), Hoffman et al.
patent: 3906464 (1975-09-01), Lattin
patent: 3964030 (1976-06-01), Koo
patent: 4021656 (1977-05-01), Caudel et al.
patent: 4038646 (1977-07-01), Mehta et al.
patent: 4061933 (1977-12-01), Schroeder et al.
patent: 4087704 (1978-05-01), Mehta et al.
Cox et al., "An FET 4-Phase Dynamic Off-Chip Driver With Polarity Hold", IBM Tech. Discl. Bull., vol. 17, No. 2, pp. 466-467; 7/1974.

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