Circuit for generating phase comparison signal

Details Circuit for generating phase comparison signal Circuit for generating phase comparison signal

2006-06-06

2006-06-06

Nguyen, Linh M. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S158000

Reexamination Certificate

active

07057428

ABSTRACT:
A delay locked loop (DLL) circuit in a synchronous dynamic random access memory includes a phase comparison signal generating circuit for generating a phase comparison reference signal by receiving a clock signal, wherein the phase comparison reference signal maintaining a first logic level longer than one period of a clock signal through a clock dividing operation, a delay chain for delaying an inverted phase comparison reference signal in response to a delay chain adjusting signal, a delay model for compensating a delay of a internal circuit by receiving an output signal of the delay chain and a phase comparator for comparing phase of the phase comparison reference signal and an output signal of the delay model.

REFERENCES:
patent: 5537068 (1996-07-01), Konno
patent: 5764711 (1998-06-01), Jokura
patent: 6288583 (2001-09-01), Ozawa et al.

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