Circuit for generating output enable signal in semiconductor...

Details Circuit for generating output enable signal in semiconductor... Circuit for generating output enable signal in semiconductor...

2007-12-18

2010-06-15

Phung, Anh (Department: 2824)

Static information storage and retrieval

Addressing

Sync/clocking

C365S189050, C365S194000, C365S233170, C365S233180

Reexamination Certificate

active

07738315

ABSTRACT:
A circuit for generating an output enable signal in a semiconductor memory apparatus which can include an interval setting unit capable of delaying a burst length signal in synchronized with a clock, thereby generating an interval setting signal, and a signal generating unit for generating an output enable signal in response to a read command signal and the interval setting signal.

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patent: 1020040048554 (2004-06-01), None
patent: 1020060075611 (2006-07-01), None

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