Circuit for generating hash values

Cryptography – Particular algorithmic function encoding

Reexamination Certificate

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C380S037000, C380S042000, C708S203000

Reexamination Certificate

active

07142669

ABSTRACT:
A Message Digest Hardware Accelerator (MDHA)10for implementing multiple cryptographic hash algorithms such as the Secure Hashing Algorithm 1 (SHA-1), the Message Digest 4 (MD4) algorithm and the Message Digest 5 (MD5) algorithm. A register file (12) is initialized to different data values. A function circuit (22) performs logical operations based on the selected algorithm and provides a data value to a summing circuit (30) that is summed with mode dependent constant values selected from registers (34and36), round and step dependent data words generated by a register array block (32) to calculate the hash value for a text message stored in registers (100–115).

REFERENCES:
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patent: 5623545 (1997-04-01), Childs et al.
patent: 6708273 (2004-03-01), Ober et al.
Schneier, Bruce, “Applied Cryptography”, 1996, John Wiley and Sons, Second Edition, pp. 436-441.

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