Circuit for generating an output signal synchronized to an input

Details Circuit for generating an output signal synchronized to an input Circuit for generating an output signal synchronized to an input

1996-01-31

1998-02-17

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327161, 375362, 348537, 348540, H03L 700

Patent

active

057195110

ABSTRACT:
A method and system for synchronizing to an incoming Hsync signal, and for generating a phase locked clock signal in response thereto. The Hsync signal and an incoming clock are coupled to a sequence of modules. Each module includes a latch for sampling the incoming clock on a transition of the Hsync signal, whose output is combined (using an XOR gate) with the Hsync signal. Each module includes a time delay for generating a delayed clock signal, incrementally delayed from the previous module in the sequence, so that the clock signal for each module is phase-offset from all other modules. The latch outputs are summed using a resistor network, to produce a triangle-shaped waveform which is phase locked to the Hsync signal and which is frequency locked to the incoming clock. The triangle-shaped waveform is compared with a constant voltage to produce a square wave.

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