Circuit for generating an output sequence of values

Details Circuit for generating an output sequence of values Circuit for generating an output sequence of values

1993-09-29

1996-08-27

Voeltz, Emanuel T.

Excavating

371 213, 3647175, G06F 1100

Patent

active

055508464

ABSTRACT:
A technique for configuring improved circuit for generating an output sequence of values such as an output sequence used to test memory components or logic circuits. The inventive method is based on the fact that a factorially produced output sequence of values can be broken or divided into partial sequences and factors which may consist of either a single constant or a single mathematically definable term can be defined there from. The partial sequences may be combined by a multiplexor to form the output sequence. This permits a simple, inexpensive circuit for fast interleaving or pulse sequences to be designed. This can be accomplished by analyzing the desired output sequence of values to be created and arranging this output sequence in partial sequences determined by their periodicity. The circuit designed by this approach needs only a single program storage means to control any number of processes, each of which contains only a single respective value and that these processes need be only a simple arithmetic and logic units (ALUs).

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patent: 5390192 (1995-02-01), Fujieda
Robshaw, "Increasing The Rate of Output for M Sequences" Electronic Letters, 12 Sep. 1991, vol. 27 No. 19, pp. 1710-1712.
M. Kanzaki et al., "Programming for Parallel Pattern Generators," Nov. 1, 1991, Proceedings of the INTL Test Conf., Paper 40.1, pp. 1061-1068.

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