Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude
Reexamination Certificate
1999-01-11
2001-05-08
Tran, Toan (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By amplitude
C327S077000
Reexamination Certificate
active
06229347
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention generally relates to integrated circuit design, and more particularly to a circuit for evaluating the antenna effect in integrated circuits.
2. Description of Related Art
Among various factors causing stability problems for an electronic component in a plasma process, the antenna effect is the most salient one. During a plasma etching process, there is an ionization phenomena on the substrate surface dissociating many charged particles, due to the bombardment from the plasma. These charged particles will follow a path with minimum resistance to a capacitor with smaller capacitance. This effect will cause the plasma current tunneling through the weakly bonded silicon dioxide layer into the substrate during the fabrication process. The damaging antenna effect is because both gate electrode and substrate are conductive, together with the gate dioxide layer, a capacitor structure is therefore formed. Furthermore, a pad having a large-area conductor to which the gate electrode connects behaves like a plane antenna to accumulate external energy and attract charges on the gate surface. When the charges exceed the capacity that the capacitor can endure, the gate dioxide layer will be tunneled through and damaged.
Different devices, for example, dynamic random access memory (DRAM) or transistors in logic circuits, have different capacities to endure the antenna effect, based on which the antenna rules (AR) are derived. During a conventional semiconductor fabricating process, different patterns are designed to obtain the antenna rules, based on which design rules can be defined and impact due to the plasma process can be examined.
To measure the antenna effect, both antenna ratio of area (A
A
), or antenna ratio of perimeter (A
P
) can be used. Note that the higher the antenna ratio, the larger the impact from the antenna effect.
Antenna ratio of area A
A
is defined as:
A
A
=M
A
/G
A
where M
Pne
is the area of interconnects, and G
A
is the area of the gate.
Antenna ratio of perimeter A
P
is defined as:
A
P
=M
P
/G
P
where M
P
is the perimeter of interconnects, and G
A
is the perimeter of the gate.
From the above-mentioned definitions, it is obvious that the larger the area or or perimeter of interconnects, the larger the antenna effect. On the other hand, the larger the area or perimeter of the gate, the smaller the antenna effect will be.
Actually, the antenna effect is the same for components with an identical symmetric structure, so that impact to components during the plasma etching process will be the same. The gate electrodes of every paired transistors can be fabricated with the same area or perimeter during a fabricating process. The area or perimeter of interconnects, however, are likely to be different, resulting in different antenna ratios for the paired transistors. If this asymmetric antenna effect is propagated to a sensitive amplifier in a circuit, it will not be possible to distinguish whether the degrading performance of a component is resulted from the plasma process or from the antenna effect.
SUMMARY OF THE INVENTION
It is therefore an objective of the present invention to provide a circuit for evaluating the asymmetric antenna effect of a transistor pair. Impact to every paired transistors can be analyzed from the differential antenna ratio obtained, based on which component parameters, for example, the standard deviation of threshold voltage and trans-conductance, can be monitored. Furthermore, an understanding as to what extent the asymmetric antenna effect will impose on the differential circuit operation can also be investigated.
In accordance with the foregoing and other objectives of the present invention, a circuit design for evaluating the asymmetric antenna effect of a transistor pair is provided, which can be implemented by using bipolar or complementary metal oxide semiconductor (CMOS) transistors to implement a differential amplifier, with which a pair of transistors Q
1
and Q
2
having similar characteristics are connected. The transistors Q
1
and Q
2
have a structure of, for example, one polysilicon layer and three metal layers, in which a second metal layer M
2
and a third metal layer M
3
are used for signal input, and metal layer M
1
close to the gate oxide layer of both the transistors Q
1
and Q
2
are used to obtain a differential antenna ratio. The differential amplifier comprises transistors Q
3
and Q
4
serving as an active load, and transistor Q
5
, which is used for adjusting the voltage gain.
REFERENCES:
patent: 5545970 (1996-08-01), Parkes, Jr. et al.
patent: 5722052 (1998-02-01), Abdi et al.
patent: 5787339 (1998-07-01), Asazawa
Huang-Lu Shiang
Wang Mu-Chun
Wu Chau-Neng
Tran Toan
United Microelectronics Corp.
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