Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means
Reexamination Certificate
2006-12-26
2006-12-26
Sircus, Brian (Department: 2836)
Electricity: electrical systems and devices
Safety and protection of systems and devices
Load shunting by fault responsive means
C361S111000, C361S091100, C361S091500
Reexamination Certificate
active
07154719
ABSTRACT:
A circuit providing protection against electrostatic discharge (ESD) for internal elements of an Integrated Circuit (IC). In one example, a protection circuit comprises a PMOSFET resistor (R) having a gate connected to a ground rail (VSS), a drain connected to an input node (ESD_RC) of an inverter (INV), a source and a bulk of the PMOSFET resistor (R) being connected to a power rail (VDD). The circuit also comprises an NMOSFET capacitor (C1) having a gate connected to the input node (ESD_RC) of the inverter (INV), a drain, a source and a bulk of the NMOSFET capacitor (C1) being connected to the ground rail (VSS). The circuit also includes a PMOSFET capacitor (C2) having a gate connected to the input node (ESD_RC) of the inverter (INV). A drain and a source of the PMOSFET capacitor (C2) being connected to the ground rail (VSS), and a bulk of the PMOSFET capacitor (C2) is connected to the power rail (VDD).
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Freescale Semiconductor Inc.
Kitov Zeev
Sircus Brian
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