Circuit for driving flat panel display

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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Details

C345S076000, C345S044000, C345S046000, C345S083000, C315S169300

Reexamination Certificate

active

10820837

ABSTRACT:
The present invention provides a circuit for driving a flat panel display, including a storage capacitor, a transmission gate and a current-limiting transistor. A first terminal of the storage capacitor is coupled to a system voltage, and a second terminal of the storage capacitor is at storage voltage. A first input/output terminal of the transmission gate is coupled to the storage voltage, and the second input/output terminal of the transmission gate is coupled to the data current source. A first gate terminal of the transmission gate is coupled to the first signal; a second gate terminal of the transmission gate is coupled to the second signal. A gate terminal of the current-limiting transistor is coupled to the storage voltage, wherein a first source/drain terminal is coupled to the system voltage, and a second source/drain terminal provides current for driving the flat panel display.

REFERENCES:
patent: 6501448 (2002-12-01), Komiya et al.
patent: 6933756 (2005-08-01), Miyazawa
patent: 2003/0214469 (2003-11-01), Kageyama et al.

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