Circuit for driving a liquid crystal display and method for...

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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Details

C345S087000, C345S088000, C345S096000, C345S097000, C345S098000, C345S099000, C345S100000, C345S101000, C345S102000, C345S103000

Reexamination Certificate

active

06661401

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to an active matrix type liquid crystal display and a method for driving the same.
In an active matrix type liquid crystal display so configured that an active element for switching each pixel in a liquid crystal display is formed of a TFT (thin film transistor), particularly, when a poly-Si (polysilicon) material is used for the TFT, it is frequently used for the liquid crystal display which is required to have a small size, such as a liquid crystal display for a projector, since it has a large current driving capability in comparison with an a-Si (amorphous silicon) TFT and others, and since a portion of a driving circuit for the liquid crystal display can be simultaneously formed on a glass plate.
A prior art example of the liquid crystal display integrated with such a driving circuit is shown in FIG.
7
. This is constituted of a pixel matrix having a pixel TFT (Mpix), a pixel capacitance (Clc) of a liquid crystal cell and a storage capacitance (Cst), which are located at each of intersections between data lines and gate lines located vertically and horizontally, respectively, a data driver circuit for driving the data lines (D
1
to Dn), a gate driver circuit for driving the gate lines (G
1
to Gm), and a precharge circuit having gates connected to receive a precharge controlling voltage for resetting a potential of the data lines (D
1
to Dn) to a certain voltage.
The gate driver circuit sequentially drives the “m” gate lines to a high level. The data driver circuit is constituted of a scan circuit having “n” outputs and “n” analog switch TFTs (S
1
to Sn). This scan circuit sequentially transfers data of a start signal DST in synchronism with a clock DCLK. The precharge circuit is constituted of “n” switches (P
1
to Pn), a gate of each of which is connected to a control terminal PCG, and a source/drain terminal of each of which is connected to a terminal PCS. Here, the pixel TFTs, the analog switch TFTs and the switch TFTs of the precharge circuit are formed of an n-channel transistor which is brought into a conducting condition when a high level voltage is applied to a gate electrode.
Now, an operation of this liquid crystal display will be described with reference to a timing chart shown in FIG.
8
. Here, TH(i) in the drawing indicates one horizontal period during which a video signal of one line in the pixel matrix is supplied. The start signal DST of the data driver circuit is applied in synchronism with the clocks DCLK so that the start signal DST is brought to a high level one time per one horizontal period. Thus, the scan circuit sequentially transfers the start signal DST in synchronism with the clocks DCLK, so that a pulse is outputted from outputs SP
1
, SP
2
, . . . of the scan circuit as shown in the drawing. The output terminals of the scan circuit are connected to the analog switch TFTs, so that the “n” analog switch TFTs are sequentially turned on and off in synchronism with the clocks DCLK.
Here, if a video signal Vsig is supplied to the liquid crystal display in synchronism with the clocks DCLK, the video signal is sequentially sampled to the data lines. In this horizontal period, since the gate line Gj (where “j” is an integer fulfilling a relation of
1
_j_m) is maintained at a high level, the video signal sampled to the data lines are written through the pixel TFTs to the liquid crystal cell Clc, Cst of the pixels. After the gate line Gj is brought to a low level, if the potential of the control signal PCG is brought to the high level during a certain period, all the switch TFTs in the precharge circuit are put into a conducting condition, so that all the data lines are reset to a voltage supplied to the terminal PCS. The above mentioned operation is executed for all the gate lines, so that a two-dimension image can be displayed.
The explanation of this timing chart is based on the assumption that the liquid crystal display is driven in a gate line inversion mode, in which during a period of supplying the liquid crystal display with a video signal positive in comparison with Vcom (opposing electrode voltage), Vps is applied to the terminal PCS as a potential for resetting the data lines, and during a period of supplying the liquid crystal display with a video signal negative in comparison with Vcom, Vng is applied to the terminal PCS as a potential for resetting the data lines.
Here, the reason for carrying out the precharging will be described. If the driving called the precharging or the previous charging is carried out, it is possible to reduce a brightness unevenness in the form of stripes in parallel to the data lines. The cause of generation of this brightness unevenness is considered to be that the video signal voltages written to the data lines become varied because of dispersion of characteristics in respective TFTs used as the analog switches. However, if the precharging is carried out, Vps or Vng is written into the data lines by means of the precharging before the video signal is written to the data lines through the analog switches, with the result that when the video signal voltages are written, the potential of the data lines is caused to change from Vps or Vng to the video signal potential. Namely, the potential of the data line changes from a value near to a potential of the video signal to be written next, regardless of the potential of the video signal to be written previously, so that the amount of the potential change of the data line becomes small. Therefore, even the analog switch TFTs are dispersed in characteristics, the variation in the voltages written into the data lines becomes small.
As mentioned above, it is possible to elevate the image quality by means of the precharging, however, the following new problems are encountered.
First, a dedicated circuit for carrying out the precharging becomes necessary, with the result that the size of the liquid crystal display becomes large because of the dedicated circuit. In addition, by providing the precharging circuit, the number of TFTs constituting the liquid crystal display becomes large, so that the yield of production lowers.
Secondly, under this system, it is required to carry out the precharging during a short horizontal blanking period which is a partial period of the horizontal period in which no video signal is applied. Therefore, an external circuit for supplying the voltage to the precharging circuit has to have a large driving capability. The reason for this is that since all the data lines are driven at a time, the capacitance becomes large.
Thirdly, the effect of the precharging is different from one place to another in the liquid crystal display. The reason for this is that, the video signal is written into the liquid crystal display in the order from left to right, but the precharge is carried out for the whole surface of the liquid crystal display at a time, with the result that the time from the precharge to the moment that the video signal is written is different from one place to another in the liquid crystal display.
BRIEF SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a drive circuit for driving an active matrix type liquid crystal display and a driving method for a liquid crystal display drive circuit, capable of improving the yield of production by eliminating the precharge circuit from the liquid crystal display panel, and of minimizing the display variation over the whole of the liquid crystal display panel by carrying out the precharging in a period different from the horizontal blanking period.
According to a first aspect of the present invention, there is provided a drive circuit for driving an active matrix type liquid crystal display, comprising a video signal generating block, a timing control block for supplying timing signals to various parts in the liquid crystal display, and a panel control pulse generation block for supplying control pulses for scanning in the liquid crystal display, wherein the video signal generating block for generating

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