Circuit for driving a capacitive load which provides low current

Details Circuit for driving a capacitive load which provides low current Circuit for driving a capacitive load which provides low current

1986-10-29

1988-03-08

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307270, 307246, 307570, 361 91, 361 56, H03K 1708, H03K 17687, H03K 17284, H03K 1716

Patent

active

047301236

ABSTRACT:
A circuit arrangement for driving a capcitive load comprises a control circuit (1), whose output is the collector of an output transistor (2). The collector is coupled through the gatesource path of a junction field effect transistor (5) and a resistor (6) connected parallel thereto to the capacitive load (8). The drain connection of the J-FET is connected to the supply voltage (Ub). The circuit permits rapid switching of the load while maintaining the current consumption relatively low.

REFERENCES:
patent: 3518454 (1970-06-01), French
patent: 4293782 (1981-10-01), Tanaka et al.
patent: 4471245 (1984-09-01), Janutka

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