Circuit for digitally deriving pulses of horizontal and vertical

Details Circuit for digitally deriving pulses of horizontal and vertical Circuit for digitally deriving pulses of horizontal and vertical

1989-09-20

1991-03-26

Shepperd, John W.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358148, H04N 508, H04N 510

Patent

active

050033921

ABSTRACT:
A video synchronizing signal having components of horizontal and vertical scan frequencies is supplied to both of first and second clocked circuit units. The first clocked circuit unit is clocked by a clock signal of a frequency substantially higher than the horizontal frequency component of the synchronizing signal and produces both horizontal frequency pulses and pulses having twice the horizontal frequency by means of a logic circuit which includes a counter. The latter pulses are used to clock the second clocked circuit unit which is supplied with pulses of horizontal frequency as well as with the synchronizing signal. By means of its logic circuits also including a counter, the second circuit unit produces pulses of vertical frequency, frame pulses of half the vertical frequency and a signal indicating whether the input synchronizing signal for both circuits conforms with a 625-line television standard or a 525-line standard. Both the first and second circuit units can be implemented by available programmable array logic (PAL) integrated components and since the processing of the input signals is all digital, there are no circuit time constants which need to be trimmed or calibrated.

REFERENCES:
patent: 4459612 (1984-07-01), Shinkai et al.
patent: 4631587 (1986-12-01), Turner
patent: 4701796 (1987-10-01), Kamiy
ABEL design language; "Language Elements"; pp. 7-1 to 7-22.
CMOS Programmable Array Logic Data Sheet PALC22V10H-25 PALC22V10H-35.

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