Circuit for detecting electrical signals at a given frequency

Communications: electrical – Selective – Intelligence comparison for controlling

Reexamination Certificate

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Details

C375S340000

Reexamination Certificate

active

06759941

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to circuits for detecting electrical signals having a predetermined frequency.
BACKGROUND OF THE INVENTION
Such detecting circuits are known and can be constructed in analog form or digital form. An analog device uses a filter which is centered at the desired frequency, and the filtered signal is applied to a threshold or level detector circuit. Such an analog device is difficult to produce in the form of an integrated circuit at a reasonable cost.
A digital device implements two different processes, of which the first includes sampling the signal and encoding the sampled amplitudes. In one of the processes, there is then performed a decomposition into a Fourier series to determine whether the frequency of the first harmonic corresponds to the desired frequency. In the other digital process, the codes of the sample are applied to a digital filter centered at the desired frequency.
Such digital devices require the use of signals for sampling and coding which have very high frequencies relative to the desired frequency, leading to integrated circuits operating at high frequencies whose manufacturing costs are correspondingly high. This cost aspect is all the more important when these analog or digital devices are used in readers for contactless IC cards, also known as contactless chip cards.
Indeed, it is more and more common, especially for controlling access to certain areas or sites, to use contactless chip cards which are detected and read at a distance by readers that send radio frequency signals, for example, at a frequency Fo=13.56 MHZ. These signals at the carrier frequency Fo are amplitude modulated by the binary values of the message to be sent to the card, for example at a frequency of around Fm=106 kHz, i.e. {fraction (1/128)}
th
of the frequency Fo.
The signals detected by the card via an antenna are used to provide electrical power to electronic circuits of the card as regards the signals at the carrier frequency. This allows the subsequent detection and interpretation of the modulated signal. In response to these amplitude modulated signals from the reader, the card produces binary signals which modulate the load on the card's antenna such that the reader, which continues to transmit at the carrier frequency Fo, detects this modulation.
In contactless chip cards operating at the carrier frequency of 13.56 MHZ, the card's modulation signal has a frequency Fc=847 KHz approximately, i.e. one sixteenth of the carrier frequency. The binary information is sent by phase changes or jumps according to a key known under the acronym BPSK, for binary phase shift key. More specifically, the signal at frequency Fc changes phase by 180° upon changing a binary digit, from 1 to 0 or from 0 to 1.
The invention more specifically concerns, in a reader for a contactless chip card, a circuit for detecting the presence of the BPSK type signal at the frequency Fc=847 KHz sent by the chip card, this signal being referred to as the “sub-carrier” relative to the signal at frequency Fo which is referred to as the “carrier”.
In a chip card reader according to the prior art, as shown in the diagram of
FIG. 1
, a receiver
10
detects the signal coming from the chip card and delivers a detected signal to an amplifier
12
and a sub-carrier detector
14
. The amplified signal is applied to a demodulator
16
which is provided for interpreting a BPSK type coded signal and for outputting the binary digits of the data sent by the chip card. The thus-detected binary numbers are only “validated”, or acknowledged, if the sub-carrier detector
14
supplies what is referred to as a “validation” signal indicating that it has recognized the sub-carrier frequency and consequently that the binary data resulting from the demodulation can be taken into consideration.
As indicated above, the sub-carrier detector
14
performs this detection either by pass-band analog filtering followed by a level detection, or by an analog-to-digital conversion followed by digital filtering or a decomposition into a Fourier series, where only the first harmonic is kept.
SUMMARY OF THE INVENTION
An object of the present invention is thus to provide a circuit for detecting the presence of a BPSK type signal at a predetermined frequency without implementing analog or digital filtering, analog-to-digital conversion or a decomposition into a Fourier series.
Another object of the invention is to provide a circuit for detecting the presence of a BPSK type signal at a predetermined frequency by implementing logic circuits which are easy produce in an integrated circuit.
The invention thus relates to a circuit for detecting electrical signals at a predetermined frequency Fc, the electrical signals being binary signals. The detection circuit includes a circuit for detecting rising edges in the binary signals, and supplying a pulse at each rising edge, and a measuring circuit for measuring the period between two pulses, and indicating by a logic state that the period is between a minimum period and a maximum period. The detection circuit also includes a shift register whose input latch memorizes the logic state indicated by the measuring circuit, a shift circuit for shifting logic states of the shift register, and supplying a shift signal D, and a decoding circuit for decoding logic states of the shift register, and supplying a signal indicating whether or not the binary signals have the required frequency.
The measuring circuit preferably includes a counter for counting pulses of a clock signal, and a decoding circuit for decoding count values, which supplies the signal of logic state when the count values are between the minimum and maximum periods between two consecutive pulses.
The shift circuit preferably includes a counter which counts the pulses of the clock signal, and a decoding circuit for decoding a specific count value which is less than the minimum period.


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patent: 5198807 (1993-03-01), Troyk et al.
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patent: 0 764 920 (1997-03-01), None
patent: 2 270 592 (1975-12-01), None

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