Circuit for detecting both charge gain and charge loss propertie

Details Circuit for detecting both charge gain and charge loss propertie Circuit for detecting both charge gain and charge loss propertie

1997-12-01

1999-06-15

Neims, David

Static information storage and retrieval

Floating gate

36518509, 36518524, G11C 1604

Patent

active

059128364

ABSTRACT:
A test circuit for observing charge retention characteristics of cells in a flash memory array is disclosed. Unlike prior art structures, the present circuit monitors both charge loss and charge gain of cells in the array. In this way, cells having conduction thresholds below a desired target threshold and cells having conduction thresholds above a desired target threshold can both be observed. The circuit includes a regular memory array, and a mirror array formed with devices having opposite channel types to the regular array. By identifying and evaluating more accurately the threshold characteristics of a particular cell design or cell process, improvements can be made to such designs and processes in a more rapid and optimal fashion.

REFERENCES:
patent: 5005155 (1991-04-01), Radjy et al.
patent: 5434824 (1995-07-01), Harari
patent: 5579259 (1996-11-01), Samachisa et al.
patent: 5640344 (1997-06-01), Pani et al.
patent: 5642311 (1997-06-01), Cleveland et al.
patent: 5719520 (1998-02-01), Au et al.

Affiliated with

Also associated with

Rating

Circuit for detecting both charge gain and charge loss propertie does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Circuit for detecting both charge gain and charge loss propertie, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit for detecting both charge gain and charge loss propertie will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-407013