Circuit for detecting arcing in an etch tool during wafer...

Details Circuit for detecting arcing in an etch tool during wafer... Circuit for detecting arcing in an etch tool during wafer...

2006-06-20

2006-06-20

Coleman, W. David (Department: 2823)

Semiconductor device manufacturing: process

Including control responsive to sensed condition

C205S791500

Reexamination Certificate

active

07063988

ABSTRACT:
According to one exemplary embodiment, a circuit configured to interface with an etch tool comprises an ESC input for receiving a first signal from the etch tool, where the first signal indicates a magnitude of a chuck current passing through a chuck holding a wafer in the etch tool. The circuit further comprises a VRF input for receiving a second signal from the etch tool, which indicates a magnitude of a voltage difference between a plasma and the chuck in the etch tool. The circuit further comprises an arc detect output indicating whether an arc event has occurred. The circuit can be configured to prevent the arc detect output from indicating an occurrence of a chucking spike and a de-chucking spike in the etch tool.

REFERENCES:
patent: 5175472 (1992-12-01), Johnson et al.
patent: 6144245 (2000-11-01), Balogh
patent: 2003/0122605 (2003-07-01), Ulrick et al.
patent: 2004/0031699 (2004-02-01), Shoji
Terry Barrette et al., “Evaluation of Early Failure Screening Mehtod”s, IEEE, 1996, pp. 14-17.
C. L. Henderson et al., “ICFAX, An Integrated Circuit Failure Analysis Expert System”,IEEE,IRPS, 1991, pp. 142-151.

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