Circuit for detecting and correcting central level of FSK...

Details Circuit for detecting and correcting central level of FSK... Circuit for detecting and correcting central level of FSK...

2005-08-23

2005-08-23

Kinkead, Arnold (Department: 2817)

Demodulators

Frequency shift keying or minimum shift keying demodulator

C329S302000, C375S324000, C375S334000

Reexamination Certificate

active

06933775

ABSTRACT:
A circuit for detecting and correcting a center level is constituted for when the length of a code of “1” or “0” in an FSK signal is extremely long and superimposed with a frequency fluctuation of a transmitter/receiver. This circuit has sample value holding circuits exclusive to “1” and “0” of an input demodulation data signal. After a difference voltage between both sample values is once converted to a digital code in an ADA converter, the converted code is re-converted to an analog value, thereby holding the value digitally. When “1” s repeat, the hold voltage to “1” is updated to new values and simultaneously a voltage obtained by subtracting the difference voltage from the above-described voltage is applied to the holding circuit for “0” to update the value in the holding circuit. Also, when “0”s repeat, the processing proceeds in reverse and the holding circuit for “1” is updated with a voltage obtained by adding the difference voltage to the hold voltage. Thus a determination on data information is made as a reference value for a comparator utilizing a mean value between both the hold voltages as a center level value.

REFERENCES:
patent: 5670951 (1997-09-01), Servilio et al.
patent: 6891905 (2005-05-01), Malone et al.

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