Pulse or digital communications – Receivers – Angle modulation
Reexamination Certificate
1998-09-22
2003-03-04
Liu, Shuwang (Department: 2634)
Pulse or digital communications
Receivers
Angle modulation
C375S272000, C375S278000, C375S316000, C375S322000
Reexamination Certificate
active
06529565
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to techniques for constructing a circuit for detecting a center error to correct same for detecting an error in a center level of a base band signal such as a demodulated base band signal in an FSK (Frequency Shift Keying) receiver used in packet communication, etc.
DESCRIPTION OF THE PRIOR ART
In transmission of an FSK signal, which is a packet signal, if there is a difference between transmitted and received frequencies or if there is an error in a central frequency of a frequency discriminator, an error is produced in the center level of a demodulated base band signal, which lowers demodulation margin. Therefore, it is necessary to correct this center error and thus heretofore various circuits for detecting a center error have been conceived.
Followings are known for these methods.
As representatives thereof there are known 1) a method in which there are disposed a positive and a negative peak hold circuit and the center level is obtained, starting from an average of peak values held therein; 2) a method in which there are disposed a positive and a negative dead zone circuit having dead zone voltage widths, which are in accordance with a positive and a negative peak value width, respectively, of the base band signal, and the center error is obtained by taking out components outputted, exceeding these dead zone voltage widths, in the base band signal; 3) a method in which the center level obtained by integrating a bit synchronizing signal, which is at a beginning of the packet signal, over a 2 bit length (a period of time of 2/baud sec (baud being transmission speed)); 4) a method in which the bit synchronizing signal is sampled twice with an interval of 1/baud sec and the center level is obtained, starting from an average of these sampled values; etc.
However these methods have advantages and disadvantages as described below.
That is, by the method using the peak hold circuits described in 1) two circuits are required; similarly to 1), also by the method using the dead zone circuits described in 2) two dead zone circuits, positive and negative, are required; by the method utilizing integration described in 3) circuits controlling discharge, integration, holding, etc. are required in the integrating circuits; by the method described in 4) in which the average of two sampled values is obtained, two sample hold circuits are required, etc.
As described above, the prior art methods have drawbacks that two circuits having a same function or that a complicated control circuit is required.
SUMMARY OF THE INVENTION
An object of the present invention is therefore to provide a circuit capable of detecting an error in the center level of the base band signal with a simple function and construction.
A circuit for detecting a center error to correct same according to the present invention is characterized in that it comprises sampling means for sampling twice a bit synchronizing signal, which is at a beginning of a packet signal, with an interval of 1/(baud rate) sec; detecting means for detecting an error in the center level of the base band signal, using an average of two sampled values obtained by using sampling output pulses from the sampling means; and correcting means for subtracting the error in the center level from the base band signal.
In the present invention, the sampling means may include a voltage/current converter, which converts the base band signal voltage into a base band signal current; a carrier detector, to which the base band signal is inputted; a control pulse generator, which outputs control pulses for sampling an output of the carrier detector; and a sampler, which samples the base band signal current according to the control pulses for sampling, while the detecting means may consist of a hold circuit, which integrates current output sampled by the sampler.
Or, in the present invention, the sampling means may include an amplifier, which amplifies the base band signal; a carrier detector, to which the base band signal is inputted; a control pulse generator, which outputs control pulses for sampling an output of the carrier detector; and a sampler, which samples an output of the amplifier according to the control pulses for sampling; while the detecting means may consist of a low pass filter, which integrates an output sampled by the sampler.
Further, in the present invention, the base band signal may be a demodulated base band signal in an FSK receiver.
REFERENCES:
patent: 5233312 (1993-08-01), Duft et al.
patent: 5436590 (1995-07-01), Simard et al.
patent: 5949829 (1999-09-01), Kawai
patent: 6097766 (2000-08-01), Okubo et al.
General Research of Electronics Inc.
Liu Shuwang
Trexler, Bushnell, Giangiorg, Blackstone & Marr, Ltd
LandOfFree
Circuit for detecting a center error to correct same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Circuit for detecting a center error to correct same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit for detecting a center error to correct same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3022930