Circuit for delaying data latching from a precharged bus and met

Details Circuit for delaying data latching from a precharged bus and met Circuit for delaying data latching from a precharged bus and met

1995-04-13

1996-03-26

Cunningham, Terry

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Utilizing three or more electrode solid-state device

327 91, 327387, 327389, 327394, H03K 17687

Patent

active

055024149

ABSTRACT:
An latch circuit includes an input line receiving electrical signals from a bus, a latch for conducting electrical signals from the precharged bus to a receiving circuit, and a structure for enabling the latch only when data is driven onto the bus.

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