Static information storage and retrieval – Powering
Patent
1992-01-23
1994-03-01
LaRoche, Eugene R.
Static information storage and retrieval
Powering
365227, G11C 300
Patent
active
052914542
ABSTRACT:
An improved output buffer circuit applicable to dynamic random access memories (DRAms) is disclosed. First power supply voltage Vcc1 is supplied to a conventional output main amplifier 3ai. Second power supply voltage Vcc2 is supplied to output driver circuit 4i. Potential fixing circuit 3bi operated in response to power supply failure detecting signal PFR of first power supply voltage Vcc1 is connected to the output of output main amplifier circuit 3ai. When second power supply voltage Vcc2 is applied without first power supply voltage Vcc1 being supplied, the gates of driving transistors Q1 and Q2 are fixed to ground potential in response to the signal PFR. Consequently, undesired current consumption is avoided, since a penetrating current does not flow through transistors Q1 and Q2.
REFERENCES:
patent: 4654829 (1987-03-01), Jiang
patent: 4933902 (1990-06-01), Yamada
patent: 4972374 (1990-11-01), Wang
patent: 5047988 (1991-09-01), Mizuta
patent: 5101119 (1992-03-01), Yoshimori
patent: 5132932 (1992-07-01), Tobita
Ikeda Yutaka
Yamasaki Kyoji
LaRoche Eugene R.
Mitsubishi Denki & Kabushiki Kaisha
Zarabian A.
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