Amplifiers – With semiconductor amplifying device – Including distributed parameter-type coupling
Reexamination Certificate
2000-10-05
2002-05-28
Pascal, Robert (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including distributed parameter-type coupling
C330S302000, C333S033000
Reexamination Certificate
active
06396348
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a circuit for dealing with higher harmonics and a circuit for amplifying a power efficiency, including the previously mentioned circuit.
2. Description of the Related Art
It is quite important for a radio—communication device driven by power supplied from a cell, such as a cellular phone, to enhance a power efficiency of a transistor amplifier in order to lengthen a period of time in which the device is operable. To this end, active elements in the radio—communication device are designed to be able to operate at a low voltage by reducing a parasitic resistance of a transistor to thereby lower a rise-up voltage as much as possible, and circuits in the radio—communication device are subject to higher harmonic treatment to reduce power loss at higher harmonics.
In general, when a transistor is biased to B-grade, an output current includes a fundamental harmonic having a frequency f
o
and M-th order higher harmonics having a frequency 2f
0
, 4f
0
, 6f
0
, - - - , and Mf
0
, wherein M is an even number.
Hence, for instance, Japanese Patent No. 2513146 has suggested a power amplifying circuit to reduce power loss caused by higher harmonics, to zero. In the suggested circuit, a load impedance exerting on an output terminal of a transistor is short-circuited at M-th order higher harmonics, so that M-th order voltage higher harmonics cannot exist, and the load impedance is released at N-th higher harmonics, so that only voltage higher harmonics can exist, wherein N is an odd number.
Most of usually used amplification circuits are designed to include a load circuit as illustrated in
FIG. 1
, which does not carry out dealing with higher harmonics. If the circuit suggested in Japanese Patent No. 2513146 is applied to the circuit illustrated in
FIG. 1
, a load circuit or a circuit for dealing with higher harmonics, as illustrated in
FIG. 2
, could be obtained.
The circuit illustrated in
FIG. 1
is comprised of an output terminal C of an amplification transistor (not illustrated), a resistor R
0
grounded at one end and having a resistance of 50 ohms, an input terminal B of the resistor R
0
, a first transmission line T
11
, and a second transmission line T
12
. The first and second transmission lines T
11
and T
12
are electrically connected in series to each other between the output terminal C and the input terminal B.
The first transmission line T
11
has a length of &lgr;/4 wherein &lgr; indicates a wavelength of a signal to be amplified, that is, a fundamental harmonics, and a resistance of 70 ohms. The second transmission line T
12
has a length of &lgr;/4, and a resistance of 32 ohms. Herein, it is assumed that the fundamental harmonics has a frequency of f
0
.
The second transmission line T
12
has a function of converting an impedance a fundamental harmonics. The illustrated circuit has a load impedance ZL in view of the input terminal C.
The first transmission line T
11
having a length of &lgr;/4 would have a length of &lgr;
2
/2 wherein &lgr;
2
indicates a wavelength of a second-order higher harmonics. Hence, an impedance of the second-order higher harmonics at the output terminal C is short-circuited, and resultingly, becomes zero. The first transmission line T
11
having a length of &lgr;/4 would have a length of 3&lgr;
3
/4 wherein &lgr;
8
indicates a wavelength of a third-order higher harmonics. Hence, an impedance of the third-order higher harmonics at the output terminal C is released, and resultingly, becomes infinite ( ). As a result, power loss caused by higher harmonics can be reduced to zero.
The load circuit illustrated in
FIG. 1
is effectual to second- and third order higher harmonics, but can not be effectual to fourth- or higher order higher harmonics. Hence, the circuit as disclosed in Japanese Patent No. 2513146 has been suggest in order to solve this problem.
FIG. 2
is a circuit diagram of the circuit suggested in Japanese Patent No. 2513146. The illustrated circuit is comprised of an output terminal C of an amplification transistor (not illustrated), a resistor R
0
grounded at one end and having a resistance of 50 ohms, an input terminal B of the resistor R
0
, a first transmission line T
11
, a second transmission line T
12
, and a plurality of transmission lines T
2
to T
7
electrically connected in parallel with one another to a connection point A between the first and second transmission lines T
11
and T
12
.
The first and second transmission lines T
11
and T
12
are electrically connected in series to each other between the output terminal C and the input terminal B.
The first transmission line T
11
has a length of &lgr;/4 wherein &lgr; indicates a wavelength of a signal to be amplified, that is, a fundamental harmonics, and a resistance of 70 ohms. The second transmission line T
12
has a length of &lgr;/4, and a resistance of 32 ohms.
Each of the transmission lines T
2
to T
7
has an open end, and has a length defined by the following equation:
L=&lgr;/
4(1+
M
)(
M=
1, 2, 3, - - -,
N
).
That is, the circuit illustrated in
FIG. 2
further includes the transmission lines T
2
to T
7
in comparison with the circuit illustrated in FIG.
1
.
The transmission line T
2
corresponding to M=1 has a length of &lgr;/8, and hence, the second-order higher harmonics is short-circuited at a connection-A through which the first and second transmission lines T
11
and T
12
are connected.
The transmission line T
3
corresponding to M=2 has a length of &lgr;/12, and hence, the third-order higher harmonics is also short-circuited at the connection A.
As is readily understood to those skilled in the art, the circuit illustrated in
FIG. 2
is also effectual to the fourth- or more order higher harmonics. Hence, by arranging the circuit between the output terminal C of a transistor acting as an amplifier and the resistor R
0
, there can be accomplished an amplification circuit having a high efficiency.
The circuit illustrated in
FIG. 2
has such a load impedance as illustrated in FIG.
3
. As is understood in
FIG. 3
, the impedance is short-circuited at M-th order higher harmonics, and is released at N-th order higher harmonics wherein M is an even number and N is an odd number.
However, comparing the load impedance illustrated in
FIG. 3
to a load impedance of the circuit illustrated in
FIG. 1
, illustrated in
FIG. 4
, it is understood that the impedance of the fundamental harmonics f
0
is deviated. This is because a reactance at a fundamental harmonics, of the added stubs, that is, the transmission lines T
2
to T
7
is residual. The residual reactance causes that a phase difference between a voltage and a current in a fundamental harmonic is deviated from an ideal difference, that is 180 degrees. This deviation in a phase difference causes power loss at a fundamental harmonics, resulting in that a power efficiency is not improved so much. Specifically, the improvement in a power efficiency is about 10% at greatest, and hence, a load power efficiency is about 70% at greatest.
Japanese Patent No. 2616464 has suggested a power amplifying circuit which allows a high-power transistor carrying out amplification at B-grade bias to supply an output to a transmission line having a certain characteristic impedance. In the suggested circuit, an output terminal of the high-power transistor is electrically connected to the transmission line through an impedance matching circuit having a length of &lgr;/4 wherein &lgr; indicates a wavelength of a fundamental harmonics. A plurality of oscillators electrically connected in series to one another is electrically connected at one ends thereof to a connection at which the impedance circuit is connected to the transmission line. The oscillators are electrically connected at the other ends thereof to an earth electrode. Each of the oscillators resonates to one of the second- or more order higher harmonics, and have a reactance greater than the certain characteristic impedance at a fundamental frequency.
Jap
Jones Stephen E.
Pascal Robert
Whitham Curtis & Christofferson, P.C.
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