Circuit for converting level of low-amplitude input

Details Circuit for converting level of low-amplitude input Circuit for converting level of low-amplitude input

1995-06-07

1997-07-08

Hjerpe, Richard

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

345204, 327291, 327333, 326 62, 326 96, G09G 336

Patent

active

056466420

ABSTRACT:
A level converting circuit for an input clock signal having a relatively low amplitude comprising a level converting circuit for converting the input clock signal to an output clock signal having a relatively high amplitude, the level converting circuit having an input transistor which has a predetermined threshold voltage, and detecting/offsetting circuit for detecting the threshold voltage of the input transistor and adding an offset voltage in response to the detected threshold voltage to the input clock signal and then for providing the offset input clock signal to the level converting circuit. The novel setup performs clock interfacing of a thin-film transistor integrated circuit device represented by an active-matrix liquid crystal display device at a relatively high speed at a low voltage below 3 V for example. This allows to fully cope with a recent trend of ever reducing operating voltage of a CMOS gate array constituting an external timing generator, eliminating necessity for building a pulse amplifier based especially on high dielectric-strength MOS process into the gate array to eventually reduce size of the chip.

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