Circuit for converting frame data

Details Circuit for converting frame data Circuit for converting frame data

1996-06-14

1998-08-25

Olms, Douglas W.

Multiplex communications

Communication techniques for information carried in plural...

Adaptive

370470, H04J 316, H04J 322

Patent

active

057990190

ABSTRACT:
A circuit for converting frame data is disclosed, in which data communications can be carried out by matching the T1 repeater line of the North American method and the E1 repeater line of the CEPT. The four 32-channel frame data of the E1 line of the CEPT method are converted into parallel data of 8-bit one channel, and are stored into four 64-byte buffers. The stored 32-channel frame data are read out by 24 channels at a time, while the remaining data of the 6 channels are added to the data which have been stored in the buffers. Thus five 24-channel frame data are converted into serial data before being outputted. Of the five 24-channel frame data of the T1 repeater line of the North American method, four 24-channel frame data are stored into four 64-byte buffers, while the remaining one 24-channel frame data are separated by 6 so as to store them into the four 64-byte buffers, so that the four 64-byte buffers can store the 32-channel data respectively. The 32-channel data which have been stored in the four 64-byte buffers are sequentially read out, and then, are converted into serial data before outputting them.

REFERENCES:
patent: 5060227 (1991-10-01), Finley et al.
patent: 5524111 (1996-06-01), Le Pennec et al.
patent: 5623491 (1997-04-01), Skoog
patent: 5627820 (1997-05-01), Kwan

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