Circuit for converting an ECL signal into a CMOS signal

Details Circuit for converting an ECL signal into a CMOS signal Circuit for converting an ECL signal into a CMOS signal

1990-09-06

1991-12-24

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307455, H03K 1720, H03K 19175

Patent

active

050755803

ABSTRACT:
A circuit for converting ECL logic level signals to CMOS logic level signals comprises a differential amplifier defining first and second current paths that are connected to a negative reference potential level. When the ECL input signal is logical zero, the first current path is non-conductive and the second path is conductive, and vice versa when the input signal is logical one. A first transistor has its base connected to the first current path, its emitter connected to a positive reference potential level, and its collector connected to the second current path. A second transistor has its base connected to the second current path, its emitter connected to the output terminal, and its collector connected to a ground reference potential level. A pull-up resistor is connected between the collector and emitter of the first transistor. The second current path includes the collector-emitter path of a third transistor, which has its base connected to the ground reference potential level and its collector connected to the base of the second resistor.

REFERENCES:
patent: 4536665 (1985-08-01), Dayton
patent: 4700087 (1987-10-01), Stroberger
patent: 4883990 (1989-11-01), Umecki

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