Circuit for converting address operands supplied by a program to

Details Circuit for converting address operands supplied by a program to Circuit for converting address operands supplied by a program to

1995-08-31

1998-01-27

Chan, Eddie P.

3954211, 395403, 395415, G06F 1210

Patent

active

057130019

ABSTRACT:
A selectable adder/hashing circuit generates a hashed virtual address from address operands within or derived from a program instruction. The hashed virtual address is used to address a translation lookaside buffer (TLB). The hashing function and addition function each comprise multiple steps. Some of the hashing function steps are performed in parallel with some of the steps of the addition function, and other of the hashing function steps are performed within other of the addition function steps. Therefore, the hashing function does not add delay over that required to produce an un-hashed virtual address from an addition function performed on the address operands. The hashing function can be enabled or disabled to meet the needs of the particular program environment. A method for generating the un-hashed address from the hashed address determines if the contents of the TLB location addressed by the hashed address match the unhashed virtual address. If so, the real address corresponding to the unhashed virtual address can be obtained from the TLB without requiring a time consuming address translation.

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IBM TDB Vol. 34, No. 12, p. 446, May, 1992, "Wired-In Hash Function For Data Cache Address Calculation", by Kahle et al.

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