Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Slope control of leading or trailing edge of rectangular or...
Reexamination Certificate
1999-01-04
2001-02-20
Tran, Toan (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Slope control of leading or trailing edge of rectangular or...
C327S134000
Reexamination Certificate
active
06191628
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to CMOS integrated circuit technology. Specifically, a circuit for implementation in CMOS technology is described which controls the slew rate of pulses on a signal line.
Digital devices such as microprocessor implemented products have time-sensitive signal paths which carry digital signals. Signal transistors comprising a digital signal along a signal path have a unique time synchronization with devices which are connected to the signal paths. One of the ways of controlling the time of arrival of a digital signal on a signal path is to control the slew rate of the signal transitions. A circuit which acts in response to a rising or falling edge of a digital signal transition may have its response delayed by decreasing the slope, or slew rate, of the rising or falling edge of the digital signal.
Various devices have been employed in the prior art to control slew rate by switching in another device in a signal path if the slew rate is too slow, such as is shown in U.S. Pat. No. 5,015,880. Other techniques for controlling slew rate include a feedback method as exemplified in U.S. Pat. No. 5,619,147. The circuits described in these patents are utilized as driver circuits, which match the impedance and reduce reflections of signals which are propagated on a signal path extending off chip, and require additional CMOS transistors to implement the slew rate control.
Slew rate control is required when operating certain CMOS circuits under high stress conditions, such as during Burn-In. During high stress conditions such as Burn-In voltages and temperatures are increased and the digital signal propagation speed and slew rate tends to increase, sometimes interfering with operation of the circuit. Decreasing the slew rate under these circumstances may restore the operation of the circuit.
Control over the slew rate also permits a reduction in noise coupling between signal lines. The faster signal transitions tend to propagate to other signal lines introducing noise on the other signal lines. By reducing slew rates it is possible to decrease this particular source of noise.
SUMMARY OF THE INVENTION
It is an object of this invention to provide a circuit which can controllably alter the slew rate of a signal propagating on a data line.
In accordance with the present invention, a circuit is provided which selectively controls the slew rate of a signal. The circuit includes a switching circuit which is capable of connecting a capacitor to a data line carrying a propagating signal when a control pulse of a first state is received. The capacity added to the data line reduces the slew rate of a propagating signal. In the absence of a control pulse, the switching circuit connects the capacitor to a terminal of a power supply used to supply current to the circuit where it serves as a bypass or decoupling capacitor for the power supply.
Thus, in one state of the control pulse, the slew rate may be advantageously decreased, and in another state of the control pulse, the slew rate is increased and the capacitor serves as a decoupling capacitor for the power supply.
Implementation of the switching circuit is accomplished through a minimum number of components, and may include as few as two field effect transistors which have a common gate connection and common drain connections. A capacitor is connected from the common drain connection to ground, and the source connections of the field effect transistors are connected to a power supply terminal and the data line.
The basic slew rate control device may be implemented in an array to provide binary changes in the slew rate, based on a selective activation of multiple slew rate control devices.
REFERENCES:
patent: 4622482 (1986-11-01), Ganger
patent: 4857863 (1989-08-01), Ganger et al.
patent: 4952863 (1990-08-01), Sartwell et al.
patent: 5023472 (1991-06-01), Hashimoto et al.
patent: 5107153 (1992-04-01), Osaki et al.
patent: 5111085 (1992-05-01), Stewart
patent: 5220209 (1993-06-01), Seymour
patent: 5220216 (1993-06-01), Woo
patent: 5459424 (1995-10-01), Hattori
patent: 5469096 (1995-11-01), Nessi et al.
patent: 5495199 (1996-02-01), Hirano
patent: 5517142 (1996-05-01), Jang et al.
patent: 5534819 (1996-07-01), Gunter et al.
patent: 5537067 (1996-07-01), Carvajal et al.
patent: 5619147 (1997-04-01), Hunley
patent: 5642067 (1997-06-01), Grace
patent: 5734277 (1998-03-01), Hu et al.
patent: 5742193 (1998-04-01), Colli et al.
Bernstein Kerry
Nowak Edward J.
Rohrer Norman J.
International Business Machines - Corporation
Pollock, Vande Sande & Amernick RLLP
Shkurko, Esq. Eugene I.
Tran Toan
LandOfFree
Circuit for controlling the slew rate of a digital signal does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Circuit for controlling the slew rate of a digital signal, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit for controlling the slew rate of a digital signal will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2596666