Circuit for controlling a power MOS transistor on an inductive l

Details Circuit for controlling a power MOS transistor on an inductive l Circuit for controlling a power MOS transistor on an inductive l

1990-03-14

1991-07-02

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307254, 307494, 307571, H03K 301, H03K 1760, H03K 522, H03K 17687

Patent

active

050288113

ABSTRACT:
In a circuit comprising a power MOS transistor (MP) connected to an inductive load (L), the gate (GP) of the power MOS transistor is connected, on the one hand, to a voltage booster circuit (3) and, on the other hand, to the drain (DL) of a logic MOS transistor (ML). A control circuit (56) fed by the supply source has an output (63) connected to the gate (GL) of the logic MOS transistor. Means are provided for limiting the source voltage of the logic MOS transistor to a voltage lower than the supply voltage (VCC) minus a predetermined threshold voltage when the power MOS transistor is conductive. The control circuit is then capable of controlling the switching of the logic MOS transistor with the supply voltage available at the supply source.

REFERENCES:
patent: 4599555 (1986-07-01), Damiano et al.
patent: 4603269 (1986-07-01), Hochstein
patent: 4628341 (1986-12-01), Thomas
patent: 4642674 (1987-02-01), Schoofs
patent: 4728826 (1988-03-01), Einzinger et al.
patent: 4931676 (1990-06-01), Baiochi et al.

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