Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Compensation for variations in external physical values
Reexamination Certificate
2000-10-20
2002-09-10
Lam, Tuan T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Gating
Compensation for variations in external physical values
C327S362000, C327S513000
Reexamination Certificate
active
06448839
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of integrated circuits, and, more particularly, to a circuit that compensates for the difference between the gate-source voltages (Vgs) of two MOS transistors of an integrated circuit. The present invention also applies to field-effect transistors of different types.
BACKGROUND OF THE INVENTION
MOS transistors are field-effect transistors produced by metal-oxide semiconductor (MOS) technology processes, and are commonly used as basic components for devices in analog and digital integrated circuits.
Characteristics of the components of integrated circuits vary relative to the design characteristics because of the variability of the production processes. MOS transistors of different types or dimensions formed in the same circuit may respond differently to process variations. In many applications, particularly in analog circuits, this different behavior of MOS transistors causes imbalances in the operation of the circuits, or undesired deviations from the operation provided for at the design stage.
An example of such an application is the input stage of an amplifier. As shown in
FIG. 1
, the input stage includes an n-channel transistor Mn and a p-channel transistor Mp having their source electrodes connected to the respective terminals of a voltage reference (ground and VDD), and their gate electrodes connected to respective biasing circuits. The biasing circuits include, in this example, two identical current generators Go respectively connected to an input node N of the input stage via a resistor Ro. The drain electrodes of the two transistors form two outputs of the input stage, and are connected to other components of the amplifier.
If the input stage is required to have a symmetrical response to an input signal applied to the input node N, the generators Go must generate identical currents, the resistors Ro must have the same resistance, and the voltages Vgsn and Vgsp between the gate electrodes and the source electrodes of the two transistors Mn and Mp must be identical. The first two conditions can be satisfied by sufficient precision, but the third cannot generally be satisfied because the two transistors are structurally different from one another. Therefore, they have different characteristic curves. Moreover, the two transistors respond differently to temperature variations during operation.
In this example, two complementary MOS transistors are considered, but similar problems also arise with the use of MOS transistor pairs that include both n-channel transistors or both p-channel transistors. These transistors have different dimensions or are biased such that different currents pass through them.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a circuit which compensates for the difference between the gate-source voltages of two MOS transistors of different types due to variations in the production processes and/or to variations of other parameters, such as temperature.
This object is achieved using a compensation circuit for compensating a difference between gate-source voltages of first and second MOS transistors of an integrated circuit. The compensation circuit preferably comprises third and fourth MOS transistors in the integrated circuit and which are respectively a same type as the first and second MOS transistors. A bias circuit is preferably connected to the third and fourth MOS transistors for biasing thereof, and a measurement circuit measures a difference between gate-source voltages of the third and fourth transistors.
The compensation circuit preferably further includes a current compensation circuit connected to the measurement circuit for generating a compensation current based upon the measured difference between the gate-source voltages of the third and fourth transistors. A bias compensation circuit is preferably connected to the measurement circuit for modifying biasing of the first and second MOS transistors using the generated compensation current.
The integrated circuit also includes a voltage compensation circuit for generating a compensation voltage to add to or substrate from the gate-source voltages of the first and second MOS transistors so that respective drain currents are equal. The difference between gate-source voltages of the first and second MOS transistors are thus compensated to overcome variations in the production processes and/or to variations of other parameters, such as temperature. The first and third MOS transistors may be p-channel MOS transistors and the second and fourth MOS transistors may be n-channel MOS transistors.
REFERENCES:
patent: 5365063 (1994-11-01), Laot et al.
patent: 0123275 (1984-10-01), None
Hogervorst R et al: “Compact CMOS Constant-GM Rail-to-Rail Input Stage With GM-Control by an Electronic Zener Diode” IEEE Journal of Solid-State Circuits, US, IEEE Inc. New York, vol. 31, No. 7, Jul. 1, 1996, pp. 1035-1040, XP000632391.
Guinea Jesus
Tomasini Luciano
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Lam Tuan T.
Nguyen Hiep
STMicroelectronics S.r.L.
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