Circuit for compensating a linearity of an input/output characte

Coded data generation or conversion – Analog to or from digital conversion – Nonlinear

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341155, H03M 136, H03M 106

Patent

active

048049417

ABSTRACT:
An improved circuit for compensating an input/output characteristic linearity of a parallel comparison type analog-to-digital converter which reduces a wasteful consumption of current in the linearity compensation circuit. In the improved linearity compensation circuit, a dummy circuit having the same construction as a bias circuit of each comparator of the A/D converter is installed for providing a current I.sub.E which is an amplification of an input current by means of the input circuit of each comparator, a first current multiplier is installed for providing a multiplied current kI.sub.E on the basis of the current provided by the dummy circuit, an amplifier is installed for providing a current ki which corresponds to a multiplication of the current i by an amplification factor of the input circuit, and a second current multiplifier is installed for providing another multiplied current kli which is a multiplication of the current ki by l. The other multiplied current kl is auxiliarily supplied to the input circuit. Therefore, the wastefully consumed current can be reduced to approximately kI.sub.E.

REFERENCES:
patent: 4216465 (1980-08-01), Huelsman
patent: 4496935 (1985-01-01), Inoue
patent: 4578715 (1986-03-01), Yamaguchi

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