Circuit for compacting data

Details Circuit for compacting data Circuit for compacting data

1980-05-23

1983-03-15

Miller, C. D.

Communications: electrical

Audible indication

Percussion-type sound producer

358261, 364900, H03K 1324

Patent

active

043769330

ABSTRACT:
A circuit for compacting variable length data words into a fixed word length format is disclosed. Each variable length data word and its associated leading 0's are separated by a delimiter bit and stored in memory. When the memory is accessed, the output word is loaded in parallel into a first shift register and shifted to strip the leading 0's and delimiter bit. The remaining data bits are then shifted serially into a second shift register. When the second shift register is full, the resultant fixed length data word is latched out. When the first shift register is empty, the next word is loaded in from memory. In this way, a series of variable length words may be compacted into a series of fixed length words. This circuit is useful for compacting variable length Huffman codes since the boundaries between codes are self evident. This circuit can also be used as a character generator, where the variable length data output comprises the bits required to generate a character image on a raster scanned display.

REFERENCES:
patent: 3016527 (1962-01-01), Gilbert
patent: 3310626 (1967-03-01), Cassidy
patent: 3863248 (1975-01-01), Deschenes
patent: 3875344 (1975-04-01), Bogart
Harrison "IBM Technical Disclosure Bulletin", vol. 5, No. 5, Oct. 1962, pp. 30-31.

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