Circuit for clock extraction from a binary data sequence

Details Circuit for clock extraction from a binary data sequence Circuit for clock extraction from a binary data sequence

2007-11-13

2011-10-04

Donovan, Lincoln (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Clock or pulse waveform generating

C327S156000, C327S158000, C327S172000, C331S016000

Reexamination Certificate

active

08030984

ABSTRACT:
The invention relates to an electronic circuit making it possible to extract a clock signal from an incident binary data sequence arriving at a constant rate. The electronic circuit comprises an oscillator (VCO) with voltage-controlled frequency providing a sinusoidal signal, a circuit (R, Cp, RD, I1, I2) for extracting the transition edges of the binary sequence producing a brief pulse at each transition, a sampler (MLT) for tapping off the level of the sinusoidal voltage at the instant of the brief pulse, and an integrator (AOP, R1, C1) for integrating this level in tandem with the successive pulses, the output of the integrator being applied as control voltage to the oscillator with controlled frequency, the output of the oscillator being the desired clock frequency with a slaved phase passing through zero substantially in the middle of the interval between two binary data transitions. Such a circuit is useful in applications for transmitting digital data of serial type, in which the data are received without at the same time receiving a clock signal.

REFERENCES:
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patent: 2001/0043086 (2001-11-01), Idei et al.
patent: 63094731 (1988-06-01), None
Bedu, J. Y., “Les PLL'S Numeriques”, Electronique Radio Plans, SPE, Paris, FR, No. 519, Feb. 1991, pp. 9-12, XP00022414, ISSN: 1144-5742.

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