Circuit for checking the defined transmission bit rates

Details Circuit for checking the defined transmission bit rates Circuit for checking the defined transmission bit rates

1990-09-25

1992-05-26

Safourek, Benedict V.

Multiplex communications

Wide area network

Packet switching

370 941, 370 84, H04J 116, H04J 314

Patent

active

051174170

ABSTRACT:
A circuit arrangement for transmitting message cells during virtual connections that allows the checking of the transmission bit rate in an ATM switching system which includes a plurality of counter means corresponding in number to the number of virtual connections. Upon the appearance of a message cell, the counters are individually driven based on the description of the cell header contained which indicates the virtual connection. An upward transgression of a defined transmission bit rate is indicated by an indicator signal produced by the respective counter means.

REFERENCES:
patent: 4218756 (1980-08-01), Fraser
patent: 4433411 (1984-02-01), Grefroerer et al.
patent: 4641302 (1987-02-01), Miller
patent: 4761800 (1988-08-01), Lese et al.
patent: 4907220 (1990-03-01), Rau et al.
patent: 5007048 (1991-04-01), Kowalk

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