Circuit for auto-zeroing a high impedance CMOS current driver

Details Circuit for auto-zeroing a high impedance CMOS current driver Circuit for auto-zeroing a high impedance CMOS current driver

1999-09-30

2001-10-09

Wells, Kenneth B. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

C327S112000, C327S437000, C330S009000

Reexamination Certificate

active

06300805

ABSTRACT:

FIELD OF THE INVENTION
This invention generally relates to CMOS current drivers. More particularly, it relates to a circuit for auto-zeroing a high impedance CMOS current driver.
BACKGROUND OF THE INVENTION
Two important attributes of any high performance current driver are its output impedance and its output offset current. Often the goal is to design a current driver with a high output impedance along with very low offset current. It is fairly straightforward to achieve the first goal through the use of cascoded or resistor de-generated FET devices to create very high output impedance current sources. However, the generation of a high output impedances typically results in the creation of output offset currents due to a mismatch between the D.C. bias currents of the upper and lower current sources that drive the output. The task of reducing TI-28914 this mismatching of currents involves both the careful layout of circuit devices, as well as the use of some additional circuitry to both measure and correct for the offset current. Typical design approaches used to achieve this “zeroing out” of offset currents tend to add a considerable amount of “circuit overhead” relative to the overall current driver topology.
SUMMARY OF THE INVENTION
The present invention introduces a simple and well-integrated method to cancel out offset currents by exploiting the high output impedance nature of CMOS current drivers. The invention uses cascoded or resistor source de-generated FET devices to create two very high impedance current sources. The mismatch between the bias currents is balanced to reduce the offset current using an auto-zeroing circuit.
The auto-zone circuit of the present invention contains three fundamental aspects. The first aspect includes means to disconnect the output of the current driver from its low impedance load. The second aspect includes means to substantially simultaneously connect a capacitor to the output of the current driver. The third aspect includes means to use the output voltage of the current sources during the zeroing mode to adjust the voltage on the capacitor. The capacitor voltage is then used to adjust either of the two output current sources to reduce the offset currents.
An advantage of the present invention is very low circuit overhead to achieve very low offset currents for a high output impedance CMOS current driver.


REFERENCES:
patent: 4518880 (1985-05-01), Masuda et al.
patent: 5774009 (1998-06-01), Popper

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