Circuit for adding and/or subtracting numbers in logarithmic rep

Details Circuit for adding and/or subtracting numbers in logarithmic rep Circuit for adding and/or subtracting numbers in logarithmic rep

1984-12-14

1988-02-23

Harkcom, Gary V.

Boots, shoes, and leggings

364715, G06F 7556, G05F 750

Patent

active

047275081

ABSTRACT:
In a digital signal processing system, a logarithmic arithmetic logic unit which selectively performs multiply/accumulate operations of operands in logarithmic number representation. Direct feed through of operands through an adder/subtractor circuit, even when an addition or subtraction is not effected, eliminates external bypass circuitry. A method for adding and subtracting operands in logarithmic number representation. An adder/subtractor circuit which efficiently effects addition and subtraction of operands in logarithmic number representation over a wide dynamic range.

REFERENCES:
patent: 4531124 (1985-07-01), Lassallette et al.
patent: 4555768 (1985-11-01), Lewis, Jr. et al.
Hall et al, "Generation of Products and Quotients Using Approximate Binary Logarithms for Digital Filtering Applications", IEEE Trans. on Comp., 2/1970, pp. 97-105.
Kingsbury et al., "Digital Filtering Using Logarithmic Arithmetic", Electronics Letters, vol. 7, No. 2, Jan. 28, 1971, pp. 56-58.
Mitchell, Jr., "Computer Multiplication and Division Using Binary Logarithms", IRE Trans. on Electronic Computers, Aug. 1962, pp. 512-517.
Brubaker et al., "Multiplication Using Logarithms Implemented With Read-Only Memory", IEEE Trans. on Comp., vol. c-24, No. 8, Aug. 1975, pp. 761-765.
Lang et al., "Integrated-Circuit Logarithmic Arithmetic Units", IEEE Trans. on Computers, vol. c-34, No. 5, 5/1985, pp. 475-483.

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