Circuit emulator

Excavating

Patent

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Details

371 162, 371 19, 3642323, 364DIG1, G06F 9312, G06F 9455, G06F 1334

Patent

active

053255127

ABSTRACT:
An In Circuit Emulator includes first and second memories, a emulation chip, gate circuit, and an input circuit. The first memory stores a program to be executed by a target system. The second memory stores a program for controlling the emulation chip. The emulation chip emulates the target system, and includes: a first latch for latching an externally supplied supervisor interrupt request signal; a second latch for latching a macro service request; and a sequencer for selectively accessing the first and second memories in response to the supervisor interrupt request signal and the macro service request to execute a corresponding program, the sequencer executing the macro service request independent of the supervisor interrupt request signal latched in the first latch. The gate circuit outputs control signals for controlling access to the first and second memories. The input circuit directly inputs the macro service request latched in the second latch.

REFERENCES:
patent: 4788683 (1988-11-01), Hester et al.
patent: 4924382 (1990-05-01), Shouda
patent: 4939637 (1990-07-01), Pawloski
patent: 4998197 (1991-03-01), Kurakazu et al.
patent: 5056013 (1991-10-01), Yamamoto
patent: 5161229 (1992-11-01), Yasui et al.

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