Circuit employing a plurality of counters and an interpolator fo

Details Circuit employing a plurality of counters and an interpolator fo Circuit employing a plurality of counters and an interpolator fo

1988-10-31

1989-11-28

Coles, Sr., Edward L.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358163, 358443, H04N 140, H04N 5228

Patent

active

048841480

ABSTRACT:
A circuit for converting a video signal into binary signals comprising a line image sensor for performing photoelectric conversion of an object to be read thereby producing pixel signals. Means are also provided for setting reference levels for respective sections of the line image sensor, the sections being divisions of the entire length of the line image sensor. A comparator compares each pixel signal with the reference level for the section to which the pixel signal in question belongs, to produce a binary signal. An interpolator is further provided for receiving the digital reference level data as is a D/A converter for converting the output of the interpolator to an analog reference level signal and supplying it to the comparator.

REFERENCES:
patent: 4133008 (1979-01-01), Tisue
patent: 4446486 (1984-05-01), Itoh
patent: 4486781 (1984-12-01), Wilmer et al.
patent: 4562486 (1985-12-01), Suzuki et al.
patent: 4672682 (1987-06-01), Naruse et al.
A. J. Dattilo et al., "Variable Intensity Illumination Scanner Calibration System", IBM Technical Disclosure Bulletin, vol. 21, No. 9, Feb. 1979, pp. 3546-3547.

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