Electricity: measuring and testing – Plural – automatically sequential tests
Patent
1988-05-17
1989-05-09
Eisenzopf, Reinhard J.
Electricity: measuring and testing
Plural, automatically sequential tests
324 73AT, 324158R, 371 25, 371 15, G01R 3128, G01R 3100
Patent
active
048292370
ABSTRACT:
A semiconductor integrated circuit has a plurality of circuits (2 and 5) to be tested for verification of operation thereof and first, second and third scanning registers (1, 4 and 6) to be used for self-testing, and it further has a register (3) for delay. In operation, predetermined test data is inputted to each of the first and second scanning registers (1and 4) and then the first and second circuits (2 and 5) to be tested process those data simultaneously. Thus, testing time is saved. Although the time required for processing in the first circuit (2) to be tested is shorter than that in the second circuit (5) to be tested, the processed data can be obtained simutaneously by the delay function of the register (3).
REFERENCES:
patent: 4504784 (1985-03-01), Goel et al.
patent: 4635261 (1987-01-01), Anderson et al.
patent: 4728883 (1988-03-01), Green
Tsui, Frank F., LSI/VLSI Testability Design. McGraw-Hill Inc., 1987: pp. 102-109.
Mead, Carver et al, Introduction to VLSI Systems. Addison-Wesley Publishing Co., Inc., 1980: pp. 75-76.
Segawa Hiroshi
Yoshimoto Masahiko
Eisenzopf Reinhard J.
Mitsubishi Denki & Kabushiki Kaisha
Nguyen Vinh P.
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