Circuit device

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip

Reexamination Certificate

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Details

C257S723000, C257S780000, C257S784000, C257S787000, C257SE23014, C257SE23079

Reexamination Certificate

active

07405486

ABSTRACT:
In stack packaging, an IC chip in an upper layer and an IC chip in a lower layer are insulated from each other by use of an insulating adhesive and the like. Thus, if an analog IC chip is stacked in the upper layer, a substrate is set in a floating state. Accordingly, there arises a problem that desired characteristics cannot be obtained. A conductive layer is disposed on an IC chip, and an analog IC chip is fixed on the conductive layer. The conductive layer is connected to a fixed potential pattern through a bonding wire and the like. Thus, a fixed potential can be applied to a rear surface (substrate) of the analog IC chip. Consequently, a mounting structure including the analog IC chip stacked in the upper layer can be realized. In addition, versatility of stack packaging for a circuit device including the analog IC chip can be improved, and a mounting area can be reduced. Moreover, characteristics can be improved.

REFERENCES:
patent: 6476331 (2002-11-01), Kim et al.
patent: 6576997 (2003-06-01), Uchida
patent: 6833287 (2004-12-01), Hur et al.
patent: 7034388 (2006-04-01), Yang et al.
patent: 2002/0096780 (2002-07-01), Chen et al.
patent: 2002/0140073 (2002-10-01), Pai et al.
patent: 11-354714 (1999-12-01), None
patent: 2002-368189 (2002-12-01), None

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