Data processing: artificial intelligence – Machine learning – Genetic algorithm and genetic programming system
Patent
1996-09-10
1999-04-27
Downs, Robert W.
Data processing: artificial intelligence
Machine learning
Genetic algorithm and genetic programming system
364488, 364491, G06F 1518, G06F 1750
Patent
active
058976280
ABSTRACT:
A circuit designing method and apparatus for the design of a large-scale logic circuit. A circuit configuration for a Programmable Logic Device (PLD) is revised in response to a genetic algorithm and then a logic circuit for providing a target output is designed. A collection of grammar rules for feeding out the PLD circuit configuration is applied as a chromosome, and the chromosome (a collection of grammar rules) is revised to feed out the chromosome giving the most suitable circuit configuration. The chromosome length is proportional to the number of grammar rules and does not depend upon the scale of the PLD circuit. Consequently, even for a large PLD circuit, it is possible to design the circuit configuration within a suitable calculating time.
REFERENCES:
patent: 5390282 (1995-02-01), Koza et al.
patent: 5615124 (1997-03-01), Hemmi et al.
Sam Martin, R. et al: "Genetic Algorithms for Optimization of Integrated Circuits Synthesis", Proceedings of the International Conference on Genetic Algorithms, University of Illinois, Urbana-Champaign, Jul. 17-21, 1993, No. Conf. 5, Jul. 17, 1993, Forrest S, pp. 432-438, XP000449248.
Kommu, V. et al: "AGFPGA: Genetic Algorithm for FPGA Technology Mapping", Proceedings of the European Design Automation Conference (EURO-DAC) with EURO-VHDL, Hamburg, Sep. 20-24, 1993, No. Conf.2, Sep. 20, 1993, Institute of Electrical and Electronics Engineers, pp. 300-305, XP000510728.
Thomson, P. et al: "Optimisation Techniques Based On The Use Of Genetic Algorithms (GAs) For Logic Implementation On FPGAs", Database Inspec Institute of Electrical Engineers, Stevenage, GB Inspec No. 4847540, XP002052461 & IEE Colloquium on `Software Support and CAD Techniques for FPGAS (Field Programmable Gate Arrays)` (Digest No. 1994/094), IEE Colloquium on `Software Support and CAD Techniques for FPGAS (Field Programmable Gate Arrays)` (Digest No. 1994/094), London, 1994, London, UK, IEE, UK, pp. 4/1-4.
Biswas, C. et al: "Technology Mapping For Lookup Table Based FPGAs Using Genetic Algorithm", Database Inspec Institute of Electrical Engineers, Stevenage, GB Inspec No. 4891266, XP002052462 & Computer Systems and Education, Proceedings of the International Conference on Computer Systems and Education in Honour of Prof. V. Rajaraman, Proceedings of International Conference on Computer Systems and Education, Bangalore, India, Jun. 22-25, 1994, ISBN 0-07-462044-4, 1994, New Delhi, India, Tata McGraw-Hill, India, pp. 236-246.
M. Davis, et al., "VLSI Circuit Synthesis using a Parallel Genetic Algorithm," Proc. First IEEE Conf. on Evolutionary Computation, vol. 1, pp. 104-109, Jun. 1994.
J. Mizoguchi, et al., "Production Genetic Algorithms for Automated Hardware Design Through an Evolutionary Process," Proc. First IEEE Conf. on Evolutionary Computation, vol. 2, pp. 661-664, Jun. 1994.
D.H. Horrocks and Y.M.A. Khalifa, "Genetically Derived Filter Circuits using Preferred Value Components," IEE Colloquium `Analog Signal Processing`, pp. 4/1-5, Oct. 1994.
H. Sakanashi, et al., "An Approach for Genetic Synthesizer of Binary Decision Diagram," Proc. IEEE Int'l. Conf. on Evolutionary Computation, pp. 559-564, May 1996.
Downs Robert W.
Frommer William S.
Sony Corporation
LandOfFree
Circuit designing method and circuit designing device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Circuit designing method and circuit designing device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit designing method and circuit designing device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-682958