Boots – shoes – and leggings
Patent
1997-04-29
1998-11-24
Teska, Kevin J.
Boots, shoes, and leggings
364490, 364491, 36475401, 36476003, G06F 1750, G06F 752
Patent
active
058416749
ABSTRACT:
A circuit design tool which includes an architecture for a multiplier which is faster and more compact than known multipliers through the use of Wallace trees, the elimination of Dadda nodes along the critical paths, the placement of half-adders at an initial pat of the Wallace tree, the replacement of low-order terminating adders with ripple-carry adders, and the replacement of high-order terminating adders with carry-select adders.
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Kik Phallaka
Teska Kevin J.
Viewlogic Systems, Inc.
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