CIRCUIT CONFIGURATIONS HAVING A DELAY DEVICE, A MULTIPLIER,...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Frequency or repetition rate conversion or control

Reexamination Certificate

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Details

C327S254000

Reexamination Certificate

active

06531904

ABSTRACT:

BACKGROUND OF THE INVENTION
FIELD OF THE INVENTION
The invention relates to a circuit configuration for generating an output signal being orthogonal to an input signal, a circuit configuration for generating a signal having a frequency being double that of an input signal, and a circuit configuration for generating two output signals being orthogonal to one another.
Such circuit configurations are also known as 90° phase shifters, and are generally known in numerous forms. A problematic feature thereof is that configurations which require little expenditure for circuitry usually function optimally only at a frequency within a narrow range, while configurations that allow greater frequency fluctuations typically require high expenditure for circuitry.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a circuit configuration for generating an output signal being orthogonal to an input signal, a circuit configuration for generating a signal having a frequency being double that of an input signal, and a circuit configuration for generating two output signals being orthogonal to one another, which overcome the hereinafore-mentioned disadvantages of the heretofore-known devices of this general type and which generate a constant 90° phase shift at less expenditure and in the presence of frequency fluctuations over a wide range.
With the foregoing and other objects in view there is provided, in accordance with the invention, a circuit configuration for generating an output signal orthogonal to an input signal, comprising a delay device having an input to which an input signal is applied, an output at which an output signal is available, and a control input for controlling a time lag; a multiplier device having inputs being coupled to the input and the output of the delay device and having an output; and a device for low-pass filtering being connected between the output of the multiplier device and the control input of the delay device.
In accordance with another feature of the invention, the delay device includes a capacitor having terminals at which the output signal can be picked up; two transistors being controlled inversely to one another by the input signal, the transistors having load paths each being connected between one terminal of the capacitor and a first supply potential; and two current sources being controlled by a signal applied to the control input and furnishing currents of equal magnitude, the sources each being connected between one terminal of the capacitor and a second supply potential.
With the objects of the invention in view there is also provided a circuit configuration for generating a signal having a frequency being double the frequency of an input signal, wherein a signal is supplied at twice the frequency of a signal at the output of the multiplier device.
With the objects of the invention in view there is additionally provided a circuit configuration for generating two output signals being orthogonal to one another, including a toggle flip-flop following the multiplier device and having outputs at which two output signals being orthogonal to one another are available.
In accordance with a concomitant feature of the invention, there is provided a device for band-pass filtering directly following the multiplier device.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a circuit configuration for generating an output signal being orthogonal to an input signal, a circuit configuration for generating a signal having a frequency being double that of an input signal, and a circuit configuration for generating two output signals being orthogonal to one another, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.


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patent: 4371839 (1983-02-01), Rubin
patent: 5015872 (1991-05-01), Rein
patent: 5066877 (1991-11-01), Hamano et al.
patent: 5297179 (1994-03-01), Tatsumi
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Patent Abstracts of Japan No. 531 5888 (Miyake), dated Nov. 26, 1993.
Patent Abstracts of Japan No. 52 147943 (Suzuki), dated Aug. 12, 1977.
“Unity-Gain Frequency Independent Quadrature Phase Shifter”, Electronics Letters, No. 10, London, 1984, pp. 431-432.

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