Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Converging with plural inputs and single output
Reexamination Certificate
2000-11-06
2001-11-20
Tran, Toan (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Gating
Converging with plural inputs and single output
C327S355000
Reexamination Certificate
active
06320447
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a circuit configuration having single-electron components and which is suitable, inter alia, for use as a logic circuit.
Present-day integrated circuit configurations for logic applications generally use CMOS technology. As components progressively become smaller, conventional CMOS technology is reaching its limits.
With regard to further miniaturization, so-called single-electron components have been proposed. There, switching processes are carried out using individual electrons. An investigation into such single-electron components is known, for example, from Rosner, et al., Microelectronic Engineering, Volume 27, 1995, pages 55-58. Single-electron components are tunnel elements which are connected to adjacent connections via tunneling contacts. Charge movements through these tunneling contacts take place both by means of the quantum-mechanics tunnel effect and simply by thermally overcoming a potential barrier, in which these charge movements occur sufficiently rarely. The tunnel elements are, for example, in the form of small conductive islands, which are surrounded by an insulating structure. If a voltage U which satisfies the conditions for Coulomb blockade is applied to the two connections, that is to say whose magnitude is |U|<e/(2C), then the charge of the tunnel element cannot change, owing to the potential conditions, as long as the following is true for the thermal energy
kT
e
⪡
e
2
C
.
Here, k is the Stefan-Boltzmann constant, T is the temperature, e is the electron charge, and C is the capacitance of the tunnel element.
If a greater voltage is applied, electrons can flow via one of the tunneling contacts to the tunnel element. These single-electron components are operated such that individual electrons move in each case.
By actuating the tunnel element via a gate electrode which capacitively influences the tunnel element without any tunnel movements occurring in the operating voltage range, it is possible to overcome the Coulomb trap or blockade. If the electrical charge acting at the gate electrode is suitable, the single-electron component has an approximately linear current/voltage characteristic, passing through the origin. Such a gate-controlled single-electron component is referred to as a single-electron transistor in the pertinent literature.
SUMMARY OF THE INVENTION
The object of the invention is to provide a configuration having single-electron components which overcomes the above-noted deficiencies and disadvantages of the prior art devices and methods of this kind, and which is suitable, inter alia, for use as a logic circuit, as well as an operating method for such a circuit configuration.
With the above and other objects in view there is provided, in accordance with the invention, a circuit configuration with single-electron components, comprising:
a first supply voltage connection, a second supply voltage connection, a third supply voltage connection, a fourth supply voltage connection, a fifth supply voltage connection, an output, a first control voltage connection, a second control voltage connection, and a third control voltage connection;
a circuit block having a first single-electron transistor, a second single-electron transistor, a third single-electron transistor, a fourth single-electron transistor, and a fifth single-electron transistor;
wherein the first single-electron transistor is connected between a first main node and a second main node, the second single-electron transistor is connected between the second main node and a third main node, and the third single-electron transistor is connected between the third main node and the output;
wherein the fourth single-electron transistor is connected between the second main node and the first supply voltage connection, and the fifth single-electron transistor is connected between the third main node and the first supply voltage connection;
wherein the second main node is capacitively connected to the second supply voltage connection, and the third main node is capacitively connected to the third supply voltage connection;
the first single-electron transistor having a gate electrode connected to the first control voltage connection, the second single-electron transistor having a gate electrode connected to the second control voltage connection, and the third single-electron transistor having a gate electrode connected to the third control voltage connection;
the fourth single-electron transistor having a gate electrode connected to the first main node, and the fifth single-electron transistor having a gate electrode connected to the second main node; and
wherein the first main node is capacitively connected to the fourth supply voltage connection, a capacitive element is connected between the first main node and the fifth supply voltage connection, and the fifth supply voltage connection is different from the first supply voltage connection.
In other words, the circuit configuration has at least one circuit block having a first single-electron transistor, a second single-electron transistor, a third single-electron transistor, a fourth single-electron transistor and a fifth single-electron transistor. The first single-electron transistor, the second single-electron transistor and the third single-electron transistor are thereby connected in series between a first main node and an output. In this case, a second main node is provided between the first single-electron transistor and the second single-electron transistor, and a third main node is provided between the second single-electron transistor and the third-single-electron transistor.
The fourth single-electron transistor is connected between the second main node and a first supply voltage connection, and the fifth single-electron transistor is connected between the third main node and the first supply voltage connection. The second main node is in this case capacitively connected to a second supply voltage connection, and the third main node is capacitively connected to a third supply voltage connection.
The gate electrode of the first single-electron transistor is connected to a first control voltage connection, the gate electrode of the second single-electron transistor is connected to a second control voltage connection, and the gate electrode of the third single-electron transistor is connected to a third control voltage connection. The gate electrode of the fourth single-electron transistor is connected to the first main node, and the gate electrode of the fifth single-electron transistor is connected to the second main node. The first main node is capacitively connected between a fourth supply voltage connection and a fifth supply voltage connection, with the first supply voltage connection being different to the fifth supply voltage connection.
The single-electron transistors each have a tunnel element, which is connected via two tunneling contacts to connections and can be influenced capacitively via a gate electrode. Since the level of the potential barrier between the two connections depends on the amount of charge present at the gate electrode, and since any charge located at the first main node acts on the gate electrode of the fourth single-electron transistor and any charge located at the second main node acts on the gate electrode of the fifth single-electron transistor, this circuit configuration allows logic links to be set up between signal charges which are located at the first main node, the second main node and the third main node, and which represent the logic data. To this end, charge carriers which are associated with the corresponding logic value are applied to the first main node, to the second main node and/or to the third main node. For example, an electron is associated with the logic value one, and no electron is associated with the logic value zero.
Charge carrier movements can take place via the tunneling contacts of the single-electron transistors both by the quantum-mechanical tunnel effect and
Ramcke Ties
Risch Lothar
Rosner Wolfgang
Greenberg Laurence A.
Infineon - Technologies AG
Lerner Herbert L.
Stemer Werner H.
Tran Toan
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