Circuit configuration for protecting terminals of integrated cir

Details Circuit configuration for protecting terminals of integrated cir Circuit configuration for protecting terminals of integrated cir

1992-09-03

1994-08-02

Dougherty, Thomas M.

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

361 91, H02H 310

Patent

active

053351347

ABSTRACT:
A circuit configuration protects the terminals of integrated circuits, in particular CMOS circuits. The circuit configuration includes bypass transistors connected between the terminals of the integrated circuit and respective supply potential terminals. The bypass transistors are thin-oxide transistors of the n-channel type and are connected such that their gate-to-source voltage is zero.

REFERENCES:
patent: 4829350 (1989-05-01), Miller
patent: 4855620 (1989-08-01), Duvvury et al.
patent: 4996626 (1991-02-01), Say
patent: 5144515 (1992-09-01), Fruhauf et al.
patent: 5208475 (1993-05-01), Mortensen

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